Added field noResults to Instruction.

Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 3 insertions, 4 deletions

diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 703da46804..b76d3b9869 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -87,6 +87,7 @@ namespace llvm {
     bool hasCtrlDep;
     bool hasInFlag;
     bool hasOutFlag;
+    bool noResults;
 
     CodeGenInstruction(Record *R, const std::string &AsmStr);
 
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index b6ddd6285c..25d01fc055 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -273,6 +273,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   hasCtrlDep   = R->getValueAsBit("hasCtrlDep");
   hasInFlag    = R->getValueAsBit("hasInFlag");
   hasOutFlag   = R->getValueAsBit("hasOutFlag");
+  noResults    = R->getValueAsBit("noResults");
   hasVariableNumberOfOperands = false;
   
   DagInit *DI;
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index 8754097d90..85ebfdece9 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -1097,11 +1097,8 @@ void DAGISelEmitter::ParseInstructions() {
       CodeGenInstruction &InstInfo =Target.getInstruction(Instrs[i]->getName());
 
       if (InstInfo.OperandList.size() != 0) {
-        // It's possible for some instruction, e.g. RET for X86 that only has an
-        // implicit flag operand.
         // FIXME: temporary hack...
-        if (InstInfo.isReturn || InstInfo.isBranch || InstInfo.isCall ||
-            InstInfo.isStore) {
+        if (InstInfo.noResults) {
           // These produce no results
           for (unsigned j = 0, e = InstInfo.OperandList.size(); j < e; ++j)
             Operands.push_back(InstInfo.OperandList[j].Rec);