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authorCraig Topper <craig.topper@gmail.com>2011-10-04 06:30:42 +0000
committerCraig Topper <craig.topper@gmail.com>2011-10-04 06:30:42 +0000
commit6744a17dcfb941d9fdd869b9f06e20660e18ff88 (patch)
treefe947adef5aa0b66a85b739c60b8f83220d61913 /utils/TableGen/X86RecognizableInstr.h
parentf143b79b78d1d244809fa59320f2af2edf4e1a86 (diff)
Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141065 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/X86RecognizableInstr.h')
-rw-r--r--utils/TableGen/X86RecognizableInstr.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.h b/utils/TableGen/X86RecognizableInstr.h
index 0b600df872..4441597827 100644
--- a/utils/TableGen/X86RecognizableInstr.h
+++ b/utils/TableGen/X86RecognizableInstr.h
@@ -60,6 +60,8 @@ private:
bool HasVEX_WPrefix;
/// Inferred from the operands; indicates whether the L bit in the VEX prefix is set
bool HasVEX_LPrefix;
+ // The ignoreVEX_L field from the record
+ bool IgnoresVEX_L;
/// The hasLockPrefix field from the record
bool HasLockPrefix;
/// The isCodeGenOnly filed from the record