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| author | Craig Topper <craig.topper@gmail.com> | 2011-12-30 05:20:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-12-30 05:20:36 +0000 |
| commit | e6a3a2990e3f783c906e9db58e55439cb06f9fa5 (patch) | |
| tree | 4308cfde3c673600ba930ed6e07fb4b22ce0bef7 /utils/TableGen/X86RecognizableInstr.cpp | |
| parent | 5d1a38cbfac62f75ee22cc0c9195616ea5fe5553 (diff) | |
Add FMA4 instructions to disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147367 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/X86RecognizableInstr.cpp')
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index ce8ea1a39a..b8b282a7a6 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -221,6 +221,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables, HasVEX_4VPrefix = Rec->getValueAsBit("hasVEX_4VPrefix"); HasVEX_4VOp3Prefix = Rec->getValueAsBit("hasVEX_4VOp3Prefix"); HasVEX_WPrefix = Rec->getValueAsBit("hasVEX_WPrefix"); + HasMemOp4Prefix = Rec->getValueAsBit("hasMemOp4Prefix"); IgnoresVEX_L = Rec->getValueAsBit("ignoresVEX_L"); HasLockPrefix = Rec->getValueAsBit("hasLockPrefix"); IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly"); @@ -690,6 +691,9 @@ void RecognizableInstr::emitInstructionSpecifier(DisassemblerTables &tables) { // in ModRMVEX and the one above the one in the VEX.VVVV field HANDLE_OPERAND(vvvvRegister) + if (HasMemOp4Prefix) + HANDLE_OPERAND(immediate) + HANDLE_OPERAND(rmRegister) if (HasVEX_4VOp3Prefix) @@ -717,6 +721,9 @@ void RecognizableInstr::emitInstructionSpecifier(DisassemblerTables &tables) { // in ModRMVEX and the one above the one in the VEX.VVVV field HANDLE_OPERAND(vvvvRegister) + if (HasMemOp4Prefix) + HANDLE_OPERAND(immediate) + HANDLE_OPERAND(memory) if (HasVEX_4VOp3Prefix) |