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authorAnshuman Dasgupta <adasgupt@codeaurora.org>2011-12-01 21:10:21 +0000
committerAnshuman Dasgupta <adasgupt@codeaurora.org>2011-12-01 21:10:21 +0000
commitdc81e5da271ed394e2029c83458773c4ae2fc5f4 (patch)
tree60e5798064500b46b1da5386e7e2413d73c8855b /utils/TableGen/TableGen.cpp
parent18c7ec1344b14c9a483b89f7ee73fba1cbdb2a38 (diff)
Add a deterministic finite automaton based packetizer for VLIW architectures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145629 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/TableGen.cpp')
-rw-r--r--utils/TableGen/TableGen.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 12ebc572a3..3899a41014 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -16,6 +16,7 @@
#include "CallingConvEmitter.h"
#include "CodeEmitterGen.h"
#include "DAGISelEmitter.h"
+#include "DFAPacketizerEmitter.h"
#include "DisassemblerEmitter.h"
#include "EDEmitter.h"
#include "FastISelEmitter.h"
@@ -47,6 +48,7 @@ enum ActionType {
GenPseudoLowering,
GenCallingConv,
GenDAGISel,
+ GenDFAPacketizer,
GenFastISel,
GenSubtarget,
GenIntrinsic,
@@ -79,6 +81,8 @@ namespace {
"Generate assembly instruction matcher"),
clEnumValN(GenDAGISel, "gen-dag-isel",
"Generate a DAG instruction selector"),
+ clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
+ "Generate DFA Packetizer for VLIW targets"),
clEnumValN(GenFastISel, "gen-fast-isel",
"Generate a \"fast\" instruction selector"),
clEnumValN(GenSubtarget, "gen-subtarget",
@@ -134,6 +138,9 @@ public:
case GenDAGISel:
DAGISelEmitter(Records).run(OS);
break;
+ case GenDFAPacketizer:
+ DFAGen(Records).run(OS);
+ break;
case GenFastISel:
FastISelEmitter(Records).run(OS);
break;