Fix a tblgen problem handling variable_ops in tblgen instruction

definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.

This fixes "rdar://5791600", whatever that is ;-).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51699 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 12 insertions, 0 deletions

diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 028fbeb88b..8390c90660 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -85,6 +85,10 @@ InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
       Record *OpR = OperandList[j].Rec;
       std::string Res;
       
+      // Discard "discard" operands.
+      if (OpR->getName() == "discard")
+        continue;
+
       if (OpR->isSubClassOf("RegisterClass"))
         Res += getQualifiedName(OpR) + "RegClassID, ";
       else
@@ -201,6 +205,14 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
     // Each logical operand can be multiple MI operands.
     MinOperands = Inst.OperandList.back().MIOperandNo +
                   Inst.OperandList.back().MINumOperands;
+
+  // Subtract the number of "discard" operands, which we'll be skipping
+  // when emitting OperandInfo records.
+  for (unsigned j = 0, e = Inst.OperandList.size(); j != e; ++j) {
+    Record *OpR = Inst.OperandList[j].Rec;
+    if (OpR->getName() == "discard")
+      --MinOperands;
+  }
   
   OS << "  { ";
   OS << Num << ",\t" << MinOperands << ",\t"