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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-11 00:28:06 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-11 00:28:06 +0000
commitb5923db192d2aa938ff3c12aaac87d80ab649625 (patch)
tree42496fc40a3cdc64a2c2b7406d28bc27f2f856b4 /utils/TableGen/CodeGenTarget.h
parent25255cbe0000abd64194e9e34098243cd689fd47 (diff)
Move the list of registers into CodeGenRegBank.
Also move the sub-register index computations from RegisterInfoEmitter into CodeGenRegBank. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132865 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.h')
-rw-r--r--utils/TableGen/CodeGenTarget.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h
index 86050fb7fa..1f1c34cb98 100644
--- a/utils/TableGen/CodeGenTarget.h
+++ b/utils/TableGen/CodeGenTarget.h
@@ -66,10 +66,8 @@ class CodeGenTarget {
mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
mutable CodeGenRegBank *RegBank;
- mutable std::vector<CodeGenRegister> Registers;
mutable std::vector<CodeGenRegisterClass> RegisterClasses;
mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
- void ReadRegisters() const;
void ReadRegisterClasses() const;
void ReadInstructions() const;
void ReadLegalValueTypes() const;
@@ -101,8 +99,7 @@ public:
CodeGenRegBank &getRegBank() const;
const std::vector<CodeGenRegister> &getRegisters() const {
- if (Registers.empty()) ReadRegisters();
- return Registers;
+ return getRegBank().getRegisters();
}
/// getRegisterByName - If there is a register with the specific AsmName,