diff options
| author | Dan Gohman <gohman@apple.com> | 2009-04-13 15:38:05 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-04-13 15:38:05 +0000 |
| commit | f8c7394781f7cf27ac52ca087e289436d36844da (patch) | |
| tree | edffc35fe9d9eb709e5582e809b3ad24363847fa /utils/TableGen/CodeGenTarget.cpp | |
| parent | 8433df36fb9566a00e643a6cb8f5e77af453ea81 (diff) | |
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 9ef64d66b5..c5d4c494c0 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -344,7 +344,12 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> if (I == Instructions.end()) throw "Could not find 'SUBREG_TO_REG' instruction!"; const CodeGenInstruction *SUBREG_TO_REG = &I->second; - + + I = getInstructions().find("COPY_TO_SUBCLASS"); + if (I == Instructions.end()) + throw "Could not find 'COPY_TO_SUBCLASS' instruction!"; + const CodeGenInstruction *COPY_TO_SUBCLASS = &I->second; + // Print out the rest of the instructions now. NumberedInstructions.push_back(PHI); NumberedInstructions.push_back(INLINEASM); @@ -356,6 +361,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> NumberedInstructions.push_back(INSERT_SUBREG); NumberedInstructions.push_back(IMPLICIT_DEF); NumberedInstructions.push_back(SUBREG_TO_REG); + NumberedInstructions.push_back(COPY_TO_SUBCLASS); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) if (&II->second != PHI && &II->second != INLINEASM && @@ -366,7 +372,8 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> &II->second != EXTRACT_SUBREG && &II->second != INSERT_SUBREG && &II->second != IMPLICIT_DEF && - &II->second != SUBREG_TO_REG) + &II->second != SUBREG_TO_REG && + &II->second != COPY_TO_SUBCLASS) NumberedInstructions.push_back(&II->second); } |