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authorJim Grosbach <grosbach@apple.com>2011-07-06 21:33:38 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-06 21:33:38 +0000
commit806fcc040e0bc7962891f12d6e09fc86f0bc2184 (patch)
tree0b688f32343558c8b9f3e9fec1e4a4a40affee21 /utils/TableGen/ARMDecoderEmitter.cpp
parent231a5ab746ca12000aa57208869a98f78781aa6b (diff)
Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only instructions can (and often do) still have encoding information associated with them. Once we've migrated all of them over to true pseudo-instructions that are lowered to real instructions prior to the printer/emitter, we can remove isCodeGenOnly and just use isPseudo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/ARMDecoderEmitter.cpp')
-rw-r--r--utils/TableGen/ARMDecoderEmitter.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp
index a7cbbcd84b..8a5dc8ba15 100644
--- a/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/utils/TableGen/ARMDecoderEmitter.cpp
@@ -421,6 +421,9 @@ public:
protected:
// Populates the insn given the uid.
void insnWithID(insn_t &Insn, unsigned Opcode) const {
+ if (AllInstructions[Opcode]->isPseudo)
+ return;
+
BitsInit &Bits = getBitsField(*AllInstructions[Opcode]->TheDef, "Inst");
for (unsigned i = 0; i < BIT_WIDTH; ++i)