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authorEvan Cheng <evan.cheng@apple.com>2011-12-08 22:30:45 +0000
committerEvan Cheng <evan.cheng@apple.com>2011-12-08 22:30:45 +0000
commite955726a0e306127317a4392aa70823c2a10420e (patch)
tree6bccabc0e06a64c70919790149a995180dea3d50 /test
parent0572c7d31ec0b8636906a66cb5f4215be85ed5e0 (diff)
Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/avx-shuffle.ll10
1 files changed, 10 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx-shuffle.ll b/test/CodeGen/X86/avx-shuffle.ll
index 0db334dd99..e66a3d48d3 100644
--- a/test/CodeGen/X86/avx-shuffle.ll
+++ b/test/CodeGen/X86/avx-shuffle.ll
@@ -8,3 +8,13 @@ define <4 x float> @test1(<4 x float> %a) nounwind {
; CHECK: vshufps
; CHECK: vpshufd
}
+
+; rdar://10538417
+define <3 x i64> @test2(<3 x i64> %v) nounwind readnone {
+; CHECK: test2:
+; CHECK: vxorps
+; CHECK: vmovsd
+ %1 = shufflevector <2 x i64> undef, <2 x i64> undef, <3 x i32> <i32 0, i32 1, i32 undef>
+ %2 = shufflevector <3 x i64> zeroinitializer, <3 x i64> %1, <3 x i32> <i32 3, i32 4, i32 2>
+ ret <3 x i64> %2
+}