diff options
author | Evan Cheng <evan.cheng@apple.com> | 2012-08-15 17:44:53 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2012-08-15 17:44:53 +0000 |
commit | a99c508c8d34c073619b71d4f50cb28110cb1a2a (patch) | |
tree | 68f954e825abd40e2459722822f6b470388c0466 /test | |
parent | 7c28978618cbbe472fe4415e56350a3461390658 (diff) |
Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows unaligned access. rdar://12091029
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161962 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/ARM/unaligned_load_store.ll | 66 |
1 files changed, 49 insertions, 17 deletions
diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll index a8237c60e4..869b92675d 100644 --- a/test/CodeGen/ARM/unaligned_load_store.ll +++ b/test/CodeGen/ARM/unaligned_load_store.ll @@ -1,25 +1,25 @@ -; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=GENERIC -; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6 -; RUN: llc < %s -mtriple=armv6-apple-darwin -arm-strict-align | FileCheck %s -check-prefix=GENERIC -; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC +; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=EXPANDED +; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=cortex-a8 -arm-strict-align -pre-RA-sched=source | FileCheck %s -check-prefix=EXPANDED +; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=UNALIGNED ; rdar://7113725 +; rdar://12091029 define void @t(i8* nocapture %a, i8* nocapture %b) nounwind { entry: -; GENERIC: t: -; GENERIC: ldrb [[R2:r[0-9]+]] -; GENERIC: ldrb [[R3:r[0-9]+]] -; GENERIC: ldrb [[R12:r[0-9]+]] -; GENERIC: ldrb [[R1:r[0-9]+]] -; GENERIC: strb [[R1]] -; GENERIC: strb [[R12]] -; GENERIC: strb [[R3]] -; GENERIC: strb [[R2]] - -; DARWIN_V6: t: -; DARWIN_V6: ldr r1 -; DARWIN_V6: str r1 +; EXPANDED: t: +; EXPANDED: ldrb [[R2:r[0-9]+]] +; EXPANDED: ldrb [[R3:r[0-9]+]] +; EXPANDED: ldrb [[R12:r[0-9]+]] +; EXPANDED: ldrb [[R1:r[0-9]+]] +; EXPANDED: strb [[R1]] +; EXPANDED: strb [[R12]] +; EXPANDED: strb [[R3]] +; EXPANDED: strb [[R2]] + +; UNALIGNED: t: +; UNALIGNED: ldr r1 +; UNALIGNED: str r1 %__src1.i = bitcast i8* %b to i32* ; <i32*> [#uses=1] %__dest2.i = bitcast i8* %a to i32* ; <i32*> [#uses=1] @@ -27,3 +27,35 @@ entry: store i32 %tmp.i, i32* %__dest2.i, align 1 ret void } + +define void @hword(double* %a, double* %b) nounwind { +entry: +; EXPANDED: hword: +; EXPANDED-NOT: vld1 +; EXPANDED: ldrh +; EXPANDED-NOT: str1 +; EXPANDED: strh + +; UNALIGNED: hword: +; UNALIGNED: vld1.16 +; UNALIGNED: vst1.16 + %tmp = load double* %a, align 2 + store double %tmp, double* %b, align 2 + ret void +} + +define void @byte(double* %a, double* %b) nounwind { +entry: +; EXPANDED: byte: +; EXPANDED-NOT: vld1 +; EXPANDED: ldrb +; EXPANDED-NOT: str1 +; EXPANDED: strb + +; UNALIGNED: byte: +; UNALIGNED: vld1.8 +; UNALIGNED: vst1.8 + %tmp = load double* %a, align 1 + store double %tmp, double* %b, align 1 + ret void +} |