diff options
| author | Bill Wendling <isanbard@gmail.com> | 2011-03-01 01:00:59 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-03-01 01:00:59 +0000 |
| commit | a656b63ee4d5b0e3f4d26a55dd4cc69795746684 (patch) | |
| tree | 207aa0386e59701c56483a84bcc30708bb82795d /test | |
| parent | f291ab2fbaa5ed1cfa20ca47e8dece1040a5065b (diff) | |
Narrow right shifts need to encode their immediates differently from a normal
shift.
16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/neon_shift.ll | 11 | ||||
| -rw-r--r-- | test/MC/ARM/neon-shift-encoding.s | 2 |
2 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/neon_shift.ll b/test/CodeGen/ARM/neon_shift.ll new file mode 100644 index 0000000000..340f220fb3 --- /dev/null +++ b/test/CodeGen/ARM/neon_shift.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +; <rdar://problem/9055897> +define <4 x i16> @t1(<4 x i32> %a) nounwind { +entry: +; CHECK: vqrshrn.s32 d{{[0-9]+}}, q{{[0-9]*}}, #13 + %x = tail call <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32> %a, <4 x i32> <i32 -13, i32 -13, i32 -13, i32 -13>) + ret <4 x i16> %x +} + +declare <4 x i16> @llvm.arm.neon.vqrshiftns.v4i16(<4 x i32>, <4 x i32>) nounwind readnone diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s index 4b4fa0876c..1985a6a647 100644 --- a/test/MC/ARM/neon-shift-encoding.s +++ b/test/MC/ARM/neon-shift-encoding.s @@ -158,3 +158,5 @@ vrshrn.i32 d16, q8, #16 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] vrshrn.i64 d16, q8, #32 +@ CHECK: vqrshrn.s32 d16, q8, #13 @ encoding: [0x70,0x09,0xd3,0xf2] + vqrshrn.s32 d16, q8, #13 |