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authorJim Grosbach <grosbach@apple.com>2011-12-08 22:06:06 +0000
committerJim Grosbach <grosbach@apple.com>2011-12-08 22:06:06 +0000
commit6b044c26094a9f86da7d12945b00a47a5f07cf6d (patch)
tree4eb9d9026c46d21962078c795cfc19b6e8ea3310 /test
parent13d2ba34f27c25d448c018a939bc7f514bdd6faf (diff)
ARM VSHR implied destination operand form aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146192 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/MC/ARM/neon-shift-encoding.s35
1 files changed, 35 insertions, 0 deletions
diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s
index 768223b391..7e4b543803 100644
--- a/test/MC/ARM/neon-shift-encoding.s
+++ b/test/MC/ARM/neon-shift-encoding.s
@@ -70,6 +70,41 @@ _foo:
@ CHECK: vshr.s32 q8, q8, #31 @ encoding: [0x70,0x00,0xe1,0xf2]
@ CHECK: vshr.s64 q8, q8, #63 @ encoding: [0xf0,0x00,0xc1,0xf2]
+@ implied destination operand variants.
+ vshr.u8 d16, #7
+ vshr.u16 d16, #15
+ vshr.u32 d16, #31
+ vshr.u64 d16, #63
+ vshr.u8 q8, #7
+ vshr.u16 q8, #15
+ vshr.u32 q8, #31
+ vshr.u64 q8, #63
+ vshr.s8 d16, #7
+ vshr.s16 d16, #15
+ vshr.s32 d16, #31
+ vshr.s64 d16, #63
+ vshr.s8 q8, #7
+ vshr.s16 q8, #15
+ vshr.s32 q8, #31
+ vshr.s64 q8, #63
+
+@ CHECK: vshr.u8 d16, d16, #7 @ encoding: [0x30,0x00,0xc9,0xf3]
+@ CHECK: vshr.u16 d16, d16, #15 @ encoding: [0x30,0x00,0xd1,0xf3]
+@ CHECK: vshr.u32 d16, d16, #31 @ encoding: [0x30,0x00,0xe1,0xf3]
+@ CHECK: vshr.u64 d16, d16, #63 @ encoding: [0xb0,0x00,0xc1,0xf3]
+@ CHECK: vshr.u8 q8, q8, #7 @ encoding: [0x70,0x00,0xc9,0xf3]
+@ CHECK: vshr.u16 q8, q8, #15 @ encoding: [0x70,0x00,0xd1,0xf3]
+@ CHECK: vshr.u32 q8, q8, #31 @ encoding: [0x70,0x00,0xe1,0xf3]
+@ CHECK: vshr.u64 q8, q8, #63 @ encoding: [0xf0,0x00,0xc1,0xf3]
+@ CHECK: vshr.s8 d16, d16, #7 @ encoding: [0x30,0x00,0xc9,0xf2]
+@ CHECK: vshr.s16 d16, d16, #15 @ encoding: [0x30,0x00,0xd1,0xf2]
+@ CHECK: vshr.s32 d16, d16, #31 @ encoding: [0x30,0x00,0xe1,0xf2]
+@ CHECK: vshr.s64 d16, d16, #63 @ encoding: [0xb0,0x00,0xc1,0xf2]
+@ CHECK: vshr.s8 q8, q8, #7 @ encoding: [0x70,0x00,0xc9,0xf2]
+@ CHECK: vshr.s16 q8, q8, #15 @ encoding: [0x70,0x00,0xd1,0xf2]
+@ CHECK: vshr.s32 q8, q8, #31 @ encoding: [0x70,0x00,0xe1,0xf2]
+@ CHECK: vshr.s64 q8, q8, #63 @ encoding: [0xf0,0x00,0xc1,0xf2]
+
@ CHECK: vsra.u8 d16, d16, #7 @ encoding: [0x30,0x01,0xc9,0xf3]
vsra.u8 d16, d16, #7
@ CHECK: vsra.u16 d16, d16, #15 @ encoding: [0x30,0x01,0xd1,0xf3]