diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-04 22:25:01 +0000 |
---|---|---|
committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-04 22:25:01 +0000 |
commit | 1ae08e007784a0708d6dae9c37b84bb62d5e1282 (patch) | |
tree | 91a7d3162b91d1cafa5bae8c04358e0f3bfbdae8 /test | |
parent | 0b9675d631a33ecde9e11febea48a2c6551bfeec (diff) |
[mips] Print move instructions.
"move $4, $5" is printed instead of "or $4, $5, $zero".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176455 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/alloca.ll | 10 | ||||
-rw-r--r-- | test/CodeGen/Mips/eh-return32.ll | 16 | ||||
-rw-r--r-- | test/CodeGen/Mips/eh-return64.ll | 16 | ||||
-rw-r--r-- | test/CodeGen/Mips/frame-address.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Mips/gpreg-lazy-binding.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/Mips/i64arg.ll | 12 | ||||
-rw-r--r-- | test/CodeGen/Mips/mips64-f128.ll | 16 | ||||
-rw-r--r-- | test/CodeGen/Mips/mips64-sret.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Mips/return_address.ll | 6 |
9 files changed, 42 insertions, 42 deletions
diff --git a/test/CodeGen/Mips/alloca.ll b/test/CodeGen/Mips/alloca.ll index 220f33bd45..d79ea9193d 100644 --- a/test/CodeGen/Mips/alloca.ll +++ b/test/CodeGen/Mips/alloca.ll @@ -3,11 +3,11 @@ define i32 @twoalloca(i32 %size) nounwind { entry: ; CHECK: subu $[[T0:[0-9]+]], $sp, $[[SZ:[0-9]+]] -; CHECK: or $sp, $[[T0]], $zero +; CHECK: move $sp, $[[T0]] ; CHECK: subu $[[T2:[0-9]+]], $sp, $[[SZ]] -; CHECK: or $sp, $[[T2]], $zero -; CHECK: or $4, $[[T0]], $zero -; CHECK: or $4, $[[T2]], $zero +; CHECK: move $sp, $[[T2]] +; CHECK: move $4, $[[T0]] +; CHECK: move $4, $[[T2]] %tmp1 = alloca i8, i32 %size, align 4 %add.ptr = getelementptr inbounds i8* %tmp1, i32 5 store i8 97, i8* %add.ptr, align 1 @@ -29,7 +29,7 @@ define i32 @alloca2(i32 %size) nounwind { entry: ; CHECK: alloca2 ; CHECK: subu $[[T0:[0-9]+]], $sp -; CHECK: or $sp, $[[T0]], $zero +; CHECK: move $sp, $[[T0]] %tmp1 = alloca i8, i32 %size, align 4 %0 = bitcast i8* %tmp1 to i32* diff --git a/test/CodeGen/Mips/eh-return32.ll b/test/CodeGen/Mips/eh-return32.ll index cf18fde5bd..fe8a40475c 100644 --- a/test/CodeGen/Mips/eh-return32.ll +++ b/test/CodeGen/Mips/eh-return32.ll @@ -25,10 +25,10 @@ entry: ; CHECK: .cfi_offset 7, ; check that stack adjustment and handler are put in $v1 and $v0. -; CHECK: or $[[R0:[a-z0-9]+]], $5, $zero -; CHECK: or $[[R1:[a-z0-9]+]], $4, $zero -; CHECK: or $3, $[[R1]], $zero -; CHECK: or $2, $[[R0]], $zero +; CHECK: move $[[R0:[a-z0-9]+]], $5 +; CHECK: move $[[R1:[a-z0-9]+]], $4 +; CHECK: move $3, $[[R1]] +; CHECK: move $2, $[[R0]] ; check that $a0-$a3 are restored from stack. ; CHECK: lw $4, [[offset0]]($sp) @@ -38,7 +38,7 @@ entry: ; check that stack is adjusted by $v1 and that code returns to address in $v0 ; CHECK: addiu $sp, $sp, [[spoffset]] -; CHECK: or $ra, $2, $zero +; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: addu $sp, $sp, $3 } @@ -64,8 +64,8 @@ entry: ; CHECK: .cfi_offset 7, ; check that stack adjustment and handler are put in $v1 and $v0. -; CHECK: or $3, $4, $zero -; CHECK: or $2, $5, $zero +; CHECK: move $3, $4 +; CHECK: move $2, $5 ; check that $a0-$a3 are restored from stack. ; CHECK: lw $4, [[offset0]]($sp) @@ -75,7 +75,7 @@ entry: ; check that stack is adjusted by $v1 and that code returns to address in $v0 ; CHECK: addiu $sp, $sp, [[spoffset]] -; CHECK: or $ra, $2, $zero +; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: addu $sp, $sp, $3 } diff --git a/test/CodeGen/Mips/eh-return64.ll b/test/CodeGen/Mips/eh-return64.ll index c410e1c0ff..0b76b95e24 100644 --- a/test/CodeGen/Mips/eh-return64.ll +++ b/test/CodeGen/Mips/eh-return64.ll @@ -25,10 +25,10 @@ entry: ; CHECK: .cfi_offset 7, ; check that stack adjustment and handler are put in $v1 and $v0. -; CHECK: or $[[R0:[a-z0-9]+]], $5, $zero -; CHECK: or $[[R1:[a-z0-9]+]], $4, $zero -; CHECK: or $3, $[[R1]], $zero -; CHECK: or $2, $[[R0]], $zero +; CHECK: move $[[R0:[a-z0-9]+]], $5 +; CHECK: move $[[R1:[a-z0-9]+]], $4 +; CHECK: move $3, $[[R1]] +; CHECK: move $2, $[[R0]] ; check that $a0-$a3 are restored from stack. ; CHECK: ld $4, [[offset0]]($sp) @@ -38,7 +38,7 @@ entry: ; check that stack is adjusted by $v1 and that code returns to address in $v0 ; CHECK: daddiu $sp, $sp, [[spoffset]] -; CHECK: or $ra, $2, $zero +; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: daddu $sp, $sp, $3 @@ -65,8 +65,8 @@ entry: ; CHECK: .cfi_offset 7, ; check that stack adjustment and handler are put in $v1 and $v0. -; CHECK: or $3, $4, $zero -; CHECK: or $2, $5, $zero +; CHECK: move $3, $4 +; CHECK: move $2, $5 ; check that $a0-$a3 are restored from stack. ; CHECK: ld $4, [[offset0]]($sp) @@ -76,7 +76,7 @@ entry: ; check that stack is adjusted by $v1 and that code returns to address in $v0 ; CHECK: daddiu $sp, $sp, [[spoffset]] -; CHECK: or $ra, $2, $zero +; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: daddu $sp, $sp, $3 diff --git a/test/CodeGen/Mips/frame-address.ll b/test/CodeGen/Mips/frame-address.ll index 9b9ee217a8..92946d9ffd 100644 --- a/test/CodeGen/Mips/frame-address.ll +++ b/test/CodeGen/Mips/frame-address.ll @@ -8,5 +8,5 @@ entry: ret i8* %0 ; CHECK: move $fp, $sp -; CHECK: or $2, $fp, $zero +; CHECK: move $2, $fp } diff --git a/test/CodeGen/Mips/gpreg-lazy-binding.ll b/test/CodeGen/Mips/gpreg-lazy-binding.ll index bb3ad4264e..88e596b3bb 100644 --- a/test/CodeGen/Mips/gpreg-lazy-binding.ll +++ b/test/CodeGen/Mips/gpreg-lazy-binding.ll @@ -2,10 +2,10 @@ @g = external global i32 -; CHECK: or $gp +; CHECK: move $gp ; CHECK: jalr $25 ; CHECK: nop -; CHECK-NOT: or $gp +; CHECK-NOT: move $gp ; CHECK: jalr $25 define void @f0() nounwind { diff --git a/test/CodeGen/Mips/i64arg.ll b/test/CodeGen/Mips/i64arg.ll index 201252487e..704014cba0 100644 --- a/test/CodeGen/Mips/i64arg.ll +++ b/test/CodeGen/Mips/i64arg.ll @@ -2,8 +2,8 @@ define void @f1(i64 %ll1, float %f, i64 %ll, i32 %i, float %f2) nounwind { entry: -; CHECK: or $[[R1:[0-9]+]], $5, $zero -; CHECK: or $[[R0:[0-9]+]], $4, $zero +; CHECK: move $[[R1:[0-9]+]], $5 +; CHECK: move $[[R0:[0-9]+]], $4 ; CHECK: ori $6, ${{[0-9]+}}, 3855 ; CHECK: ori $7, ${{[0-9]+}}, 22136 ; CHECK: lw $25, %call16(ff1) @@ -12,16 +12,16 @@ entry: ; CHECK: lw $25, %call16(ff2) ; CHECK: lw $[[R2:[0-9]+]], 80($sp) ; CHECK: lw $[[R3:[0-9]+]], 84($sp) -; CHECK: or $4, $[[R2]], $zero -; CHECK: or $5, $[[R3]], $zero +; CHECK: move $4, $[[R2]] +; CHECK: move $5, $[[R3]] ; CHECK: jalr $25 tail call void @ff2(i64 %ll, double 3.000000e+00) nounwind %sub = add nsw i32 %i, -1 ; CHECK: lw $25, %call16(ff3) ; CHECK: sw $[[R1]], 28($sp) ; CHECK: sw $[[R0]], 24($sp) -; CHECK: or $6, $[[R2]], $zero -; CHECK: or $7, $[[R3]], $zero +; CHECK: move $6, $[[R2]] +; CHECK: move $7, $[[R3]] ; CHECK: jalr $25 tail call void @ff3(i32 %i, i64 %ll, i32 %sub, i64 %ll1) nounwind ret void diff --git a/test/CodeGen/Mips/mips64-f128.ll b/test/CodeGen/Mips/mips64-f128.ll index c6dd434dd7..0662694998 100644 --- a/test/CodeGen/Mips/mips64-f128.ll +++ b/test/CodeGen/Mips/mips64-f128.ll @@ -615,8 +615,8 @@ entry: ; CHECK: select_LD: ; CHECK: movn $8, $6, $4 ; CHECK: movn $9, $7, $4 -; CHECK: or $2, $8, $zero -; CHECK: or $3, $9, $zero +; CHECK: move $2, $8 +; CHECK: move $3, $9 define fp128 @select_LD(i32 %a, i64, fp128 %b, fp128 %c) { entry: @@ -626,17 +626,17 @@ entry: } ; CHECK: selectCC_LD: -; CHECK: or $[[R0:[0-9]+]], $11, $zero -; CHECK: or $[[R1:[0-9]+]], $10, $zero -; CHECK: or $[[R2:[0-9]+]], $9, $zero -; CHECK: or $[[R3:[0-9]+]], $8, $zero +; CHECK: move $[[R0:[0-9]+]], $11 +; CHECK: move $[[R1:[0-9]+]], $10 +; CHECK: move $[[R2:[0-9]+]], $9 +; CHECK: move $[[R3:[0-9]+]], $8 ; CHECK: ld $25, %call16(__gttf2)($gp) ; CHECK: jalr $25 ; CHECK: slti $1, $2, 1 ; CHECK: movz $[[R1]], $[[R3]], $1 ; CHECK: movz $[[R0]], $[[R2]], $1 -; CHECK: or $2, $[[R1]], $zero -; CHECK: or $3, $[[R0]], $zero +; CHECK: move $2, $[[R1]] +; CHECK: move $3, $[[R0]] define fp128 @selectCC_LD(fp128 %a, fp128 %b, fp128 %c, fp128 %d) { entry: diff --git a/test/CodeGen/Mips/mips64-sret.ll b/test/CodeGen/Mips/mips64-sret.ll index eb08e700bc..e01609f3b1 100644 --- a/test/CodeGen/Mips/mips64-sret.ll +++ b/test/CodeGen/Mips/mips64-sret.ll @@ -6,7 +6,7 @@ define void @f(%struct.S* noalias sret %agg.result) nounwind { entry: -; CHECK: or $2, $4, $zero +; CHECK: move $2, $4 %0 = bitcast %struct.S* %agg.result to i8* call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast (%struct.S* @g to i8*), i64 32, i32 4, i1 false) diff --git a/test/CodeGen/Mips/return_address.ll b/test/CodeGen/Mips/return_address.ll index 3bcd5601ee..34b72baa6d 100644 --- a/test/CodeGen/Mips/return_address.ll +++ b/test/CodeGen/Mips/return_address.ll @@ -5,7 +5,7 @@ entry: %0 = call i8* @llvm.returnaddress(i32 0) ret i8* %0 -; CHECK: or $2, $ra, $zero +; CHECK: move $2, $ra } define i8* @f2() nounwind { @@ -14,9 +14,9 @@ entry: %0 = call i8* @llvm.returnaddress(i32 0) ret i8* %0 -; CHECK: or $[[R0:[0-9]+]], $ra, $zero +; CHECK: move $[[R0:[0-9]+]], $ra ; CHECK: jal -; CHECK: or $2, $[[R0]], $zero +; CHECK: move $2, $[[R0]] } declare i8* @llvm.returnaddress(i32) nounwind readnone |