Remove the vicmp and vfcmp instructions. Because we never had a release with

these instructions, no autoupgrade or backwards compatibility support is
provided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 18 insertions, 18 deletions

diff --git a/test/Assembler/vector-cmp.ll b/test/Assembler/vector-cmp.ll
index 383c0faf62..e4d35d9c98 100644
--- a/test/Assembler/vector-cmp.ll
+++ b/test/Assembler/vector-cmp.ll
@@ -1,16 +1,16 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*vicmp slt}
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*icmp slt}
 ; PR2317
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin9.2.2"
 
-define <4 x i32> @foo(<4 x float> %a, <4 x float> %b) nounwind  {
+define <4 x i1> @foo(<4 x float> %a, <4 x float> %b) nounwind  {
 entry:
-	%cmp = vfcmp olt <4 x float> %a, %b		; <4 x i32> [#uses=1]
-	ret <4 x i32> %cmp
+	%cmp = fcmp olt <4 x float> %a, %b		; <4 x i32> [#uses=1]
+	ret <4 x i1> %cmp
 }
 
-global <4 x i32> vicmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>  <i32 1, i32 2, i32 1, i32 2> ) ;
+global <4 x i1> icmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>  <i32 1, i32 2, i32 1, i32 2> ) ;
 
 @B = external global i32;
 
-global <4 x i32> vicmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32>  <i32 1, i32 2, i32 1, i32 2> ) ;
+global <4 x i1> icmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32>  <i32 1, i32 2, i32 1, i32 2> ) ;
diff --git a/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll b/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
index 4c71463204..2cb01ba446 100644
--- a/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
+++ b/test/Transforms/ConstProp/2008-07-07-VectorCompare.ll
@@ -1,28 +1,28 @@
 ; RUN: llvm-as < %s | opt -constprop -disable-output
 ; PR2529
-define <4 x i32> @test1(i32 %argc, i8** %argv) {
+define <4 x i1> @test1(i32 %argc, i8** %argv) {
 entry:  
-        %foo = vicmp slt <4 x i32> undef, <i32 14, i32 undef, i32 undef, i32 undef>
-        ret <4 x i32> %foo
+        %foo = icmp slt <4 x i32> undef, <i32 14, i32 undef, i32 undef, i32 undef>
+        ret <4 x i1> %foo
 }
 
-define <4 x i32> @test2(i32 %argc, i8** %argv) {
+define <4 x i1> @test2(i32 %argc, i8** %argv) {
 entry:  
-        %foo = vicmp slt <4 x i32> <i32 undef, i32 undef, i32 undef, i32
+        %foo = icmp slt <4 x i32> <i32 undef, i32 undef, i32 undef, i32
 undef>, <i32 undef, i32 undef, i32 undef, i32 undef>
-        ret <4 x i32> %foo
+        ret <4 x i1> %foo
 }
 
 
-define <4 x i32> @test3() {
-       %foo = vfcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float
+define <4 x i1> @test3() {
+       %foo = fcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float
 undef>, <float 1.0, float 1.0, float 1.0, float undef>
-	ret <4 x i32> %foo
+	ret <4 x i1> %foo
 }
 
-define <4 x i32> @test4() {
-   %foo = vfcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <float 1.0, float 1.0, float 1.0, float 0.0>
+define <4 x i1> @test4() {
+	%foo = fcmp ueq <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <float 1.0, float 1.0, float 1.0, float 0.0>
 
-	ret <4 x i32> %foo
+	ret <4 x i1> %foo
 }