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| author | Richard Osborne <richard@xmos.com> | 2013-01-25 20:20:07 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-01-25 20:20:07 +0000 |
| commit | 3b6a5eefe0ab2199bc69094b390b736ae332b905 (patch) | |
| tree | 029fc2df61283b322728a1d3022a2f60c0a10264 /test/MC | |
| parent | 0e3f4269486ff2b89211e562a55775129fc2646b (diff) | |
Add instruction encodings / disassembly support for l5r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173479 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
| -rw-r--r-- | test/MC/Disassembler/XCore/xcore.txt | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index d9d7e097bd..fdc769649d 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -461,3 +461,14 @@ # CHECK: lmul r11, r0, r2, r5, r8, r10 0xf9 0xfa 0x02 0x06 + +# l5r instructions + +# CHECK: ladd r10, r2, r5, r1, r7 +0xe5 0xf8 0xfb 0x06 + +# CHECK: ldivu r5, r6, r3, r9, r8 +0x54 0xfe 0x0b 0x07 + +# CHECK: lsub r1, r8, r7, r11, r5 +0xcf 0xfd 0x85 0x0f |