diff options
| author | Kevin Enderby <enderby@apple.com> | 2011-10-27 17:40:41 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2011-10-27 17:40:41 +0000 |
| commit | 55c4127134d127ccd52cc2f4115af00084b28807 (patch) | |
| tree | 92ffd2300d468253da36dc89476a9e98c8c22190 /test/MC/X86 | |
| parent | 88484c00307274568ab068909cb38ecaedd41cbf (diff) | |
Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
not depend on In32BitMode. Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode. rdar://9738584
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143112 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/X86')
| -rw-r--r-- | test/MC/X86/x86-32-coverage.s | 7 | ||||
| -rw-r--r-- | test/MC/X86/x86-64.s | 12 | ||||
| -rw-r--r-- | test/MC/X86/x86_errors.s | 2 |
3 files changed, 21 insertions, 0 deletions
diff --git a/test/MC/X86/x86-32-coverage.s b/test/MC/X86/x86-32-coverage.s index 0954ce2b02..577ac40e32 100644 --- a/test/MC/X86/x86-32-coverage.s +++ b/test/MC/X86/x86-32-coverage.s @@ -500,6 +500,9 @@ // CHECK: sysexit sysexit +// CHECK: sysexitl + sysexitl + // CHECK: ud2 ud2 @@ -4417,6 +4420,10 @@ // CHECK: encoding: [0x0f,0x35] sysexit +// CHECK: sysexitl +// CHECK: encoding: [0x0f,0x35] + sysexitl + // CHECK: fxsave 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0x0f,0xae,0x84,0xcb,0xef,0xbe,0xad,0xde] fxsave 0xdeadbeef(%ebx,%ecx,8) diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index a9cdaa495f..6c836fca90 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -1191,3 +1191,15 @@ xchgl %ecx, %eax // CHECK: xchgl %ecx, %eax // CHECK: encoding: [0x91] xchgl %eax, %ecx + +// CHECK: sysexit +// CHECK: encoding: [0x0f,0x35] +sysexit + +// CHECK: sysexitl +// CHECK: encoding: [0x0f,0x35] +sysexitl + +// CHECK: sysexitq +// CHECK: encoding: [0x48,0x0f,0x35] +sysexitq diff --git a/test/MC/X86/x86_errors.s b/test/MC/X86/x86_errors.s index 054331ad81..8de7444ea6 100644 --- a/test/MC/X86/x86_errors.s +++ b/test/MC/X86/x86_errors.s @@ -18,3 +18,5 @@ addl $0, 0(%rax) movl 0(%rax), 0(%edx) // error: invalid operand for instruction +// 32: error: instruction requires a CPU feature not currently enabled +sysexitq |