diff options
| author | Jim Grosbach <grosbach@apple.com> | 2009-11-23 21:08:25 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-11-23 21:08:25 +0000 |
| commit | 77b02beb1fa3a96efc05081889d1ae4ffecb44a7 (patch) | |
| tree | 956fdf1f0128ebeaf5f344708efc334d78574e70 /test/CodeGen | |
| parent | da1aea4d7551d05cfb28a565b9750b7965cd620a (diff) | |
move fconst[sd] to UAL. <rdar://7414913>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/fpconsts.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/cross-rc-coalescing-2.ll | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll b/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll index dd2845fe6a..7aae3acd76 100644 --- a/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll +++ b/test/CodeGen/ARM/2009-11-07-SubRegAsmPrinting.ll @@ -13,7 +13,7 @@ entry: %4 = fadd float 0.000000e+00, %3 ; <float> [#uses=1] %5 = fsub float 1.000000e+00, %4 ; <float> [#uses=1] ; CHECK: foo: -; CHECK: fconsts s{{[0-9]+}}, #112 +; CHECK: vmov.f32 s{{[0-9]+}}, #1.000000e+00 %6 = fsub float 1.000000e+00, undef ; <float> [#uses=2] %7 = fsub float %2, undef ; <float> [#uses=1] %8 = fsub float 0.000000e+00, undef ; <float> [#uses=3] diff --git a/test/CodeGen/ARM/fpconsts.ll b/test/CodeGen/ARM/fpconsts.ll index 4de18bc3b4..710994d8d7 100644 --- a/test/CodeGen/ARM/fpconsts.ll +++ b/test/CodeGen/ARM/fpconsts.ll @@ -3,7 +3,7 @@ define arm_apcscc float @t1(float %x) nounwind readnone optsize { entry: ; CHECK: t1: -; CHECK: fconsts s1, #16 +; CHECK: vmov.f32 s1, #4.000000e+00 %0 = fadd float %x, 4.000000e+00 ret float %0 } @@ -11,7 +11,7 @@ entry: define arm_apcscc double @t2(double %x) nounwind readnone optsize { entry: ; CHECK: t2: -; CHECK: fconstd d1, #8 +; CHECK: vmov.f64 d1, #3.000000e+00 %0 = fadd double %x, 3.000000e+00 ret double %0 } @@ -19,7 +19,7 @@ entry: define arm_apcscc double @t3(double %x) nounwind readnone optsize { entry: ; CHECK: t3: -; CHECK: fconstd d1, #170 +; CHECK: vmov.f64 d1, #-1.300000e+01 %0 = fmul double %x, -1.300000e+01 ret double %0 } @@ -27,7 +27,7 @@ entry: define arm_apcscc float @t4(float %x) nounwind readnone optsize { entry: ; CHECK: t4: -; CHECK: fconsts s1, #184 +; CHECK: vmov.f32 s1, #-2.400000e+01 %0 = fmul float %x, -2.400000e+01 ret float %0 } diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll index 607012799d..8f6449e8ff 100644 --- a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll +++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 6 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 7 define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind { entry: |