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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2012-12-12 20:29:20 +0000 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2012-12-12 20:29:20 +0000 |
| commit | 71fe60ef10779aa44bbbbece288b4a30d50852e9 (patch) | |
| tree | a3b6a7bdfec2007bc9b9f8df8c0b3f2e58af8ad0 /test/CodeGen | |
| parent | 728fbdb79610113765304a3967d45daa5a041664 (diff) | |
The ordering of two relocations on the same instruction is apparently not
predictable when compiled on at least one non-PowerPC host. Source of
nondeterminism not apparent. Restrict the test to build on PowerPC hosts
for now while looking into the issue further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170016 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/PowerPC/tls-ld-obj.ll | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/test/CodeGen/PowerPC/tls-ld-obj.ll b/test/CodeGen/PowerPC/tls-ld-obj.ll index 4b9f340fdd..9f33fee8ad 100644 --- a/test/CodeGen/PowerPC/tls-ld-obj.ll +++ b/test/CodeGen/PowerPC/tls-ld-obj.ll @@ -4,6 +4,10 @@ ; Test correct relocation generation for thread-local storage using ; the local dynamic model. +; Relocations 2 and 3 seem to come out in unpredictable order on some +; architectures, so restrict this for now. +; REQUIRES: ppc64-registered-target + target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -17,9 +21,10 @@ entry: ret i32 %0 } -; Verify generation of R_PPC64_GOT_TLSGD16_HA, R_PPC64_GOT_TLSGD16_LO, -; and R_PPC64_TLSGD for accessing external variable a, and R_PPC64_REL24 -; for the call to __tls_get_addr. +; Verify generation of R_PPC64_GOT_TLSLD16_HA, R_PPC64_GOT_TLSLD16_LO, +; R_PPC64_TLSLD, R_PPC64_DTPREL16_HA, and R_PPC64_DTPREL16_LO for +; accessing external variable a, and R_PPC64_REL24 for the call to +; __tls_get_addr. ; ; CHECK: '.rela.text' ; CHECK: Relocation 0 |