Run codegen dce pass for all targets at all optimization levels. Previously it's

only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8

8 files changed, 14 insertions, 70 deletions

diff --git a/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll b/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll
deleted file mode 100644
index debb461216..0000000000
--- a/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll
+++ /dev/null
@@ -1,58 +0,0 @@
-; RUN: llc < %s -march=x86 -stats |& \
-; RUN:   grep {1 .*folded into instructions}
-; RUN: llc < %s -march=x86 | grep cmp | count 4
-
-	%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
-
-define fastcc i32 @perimeter(%struct.quad_struct* %tree, i32 %size) {
-entry:
-	%tree.idx7.val = load %struct.quad_struct** null		; <%struct.quad_struct*> [#uses=1]
-	%tmp8.i51 = icmp eq %struct.quad_struct* %tree.idx7.val, null		; <i1> [#uses=2]
-	br i1 %tmp8.i51, label %cond_next, label %cond_next.i52
-
-cond_next.i52:		; preds = %entry
-	ret i32 0
-
-cond_next:		; preds = %entry
-	%tmp59 = load i32* null, align 4		; <i32> [#uses=1]
-	%tmp70 = icmp eq i32 %tmp59, 2		; <i1> [#uses=1]
-	br i1 %tmp70, label %cond_true.i35, label %bb80
-
-cond_true.i35:		; preds = %cond_next
-	%tmp14.i.i37 = load %struct.quad_struct** null, align 4		; <%struct.quad_struct*> [#uses=1]
-	%tmp3.i160 = load i32* null, align 4		; <i32> [#uses=1]
-	%tmp4.i161 = icmp eq i32 %tmp3.i160, 2		; <i1> [#uses=1]
-	br i1 %tmp4.i161, label %cond_true.i163, label %cond_false.i178
-
-cond_true.i163:		; preds = %cond_true.i35
-	%tmp7.i162 = sdiv i32 %size, 4		; <i32> [#uses=2]
-	%tmp13.i168 = tail call fastcc i32 @sum_adjacent( %struct.quad_struct* null, i32 3, i32 2, i32 %tmp7.i162 )		; <i32> [#uses=1]
-	%tmp18.i11.i170 = getelementptr %struct.quad_struct* %tmp14.i.i37, i32 0, i32 4		; <%struct.quad_struct**> [#uses=1]
-	%tmp19.i12.i171 = load %struct.quad_struct** %tmp18.i11.i170, align 4		; <%struct.quad_struct*> [#uses=1]
-	%tmp21.i173 = tail call fastcc i32 @sum_adjacent( %struct.quad_struct* %tmp19.i12.i171, i32 3, i32 2, i32 %tmp7.i162 )		; <i32> [#uses=1]
-	%tmp22.i174 = add i32 %tmp21.i173, %tmp13.i168		; <i32> [#uses=1]
-	br i1 %tmp4.i161, label %cond_true.i141, label %cond_false.i156
-
-cond_false.i178:		; preds = %cond_true.i35
-	ret i32 0
-
-cond_true.i141:		; preds = %cond_true.i163
-	%tmp7.i140 = sdiv i32 %size, 4		; <i32> [#uses=1]
-	%tmp21.i151 = tail call fastcc i32 @sum_adjacent( %struct.quad_struct* null, i32 3, i32 2, i32 %tmp7.i140 )		; <i32> [#uses=0]
-	ret i32 0
-
-cond_false.i156:		; preds = %cond_true.i163
-	%tmp22.i44 = add i32 0, %tmp22.i174		; <i32> [#uses=0]
-	br i1 %tmp8.i51, label %bb22.i, label %cond_next.i
-
-bb80:		; preds = %cond_next
-	ret i32 0
-
-cond_next.i:		; preds = %cond_false.i156
-	ret i32 0
-
-bb22.i:		; preds = %cond_false.i156
-	ret i32 0
-}
-
-declare fastcc i32 @sum_adjacent(%struct.quad_struct*, i32, i32, i32)
diff --git a/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll b/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
index 9e58872b73..7b5e871246 100644
--- a/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
+++ b/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
@@ -13,7 +13,6 @@ define i32 @t(i32 %clientPort, i32 %pluginID, i32 %requestID, i32 %objectID, i64
 entry:
 ; CHECK: _t:
 ; CHECK: movl 16(%rbp),
-; CHECK: movl 16(%rbp), %edx
   %0 = zext i32 %argumentsLength to i64           ; <i64> [#uses=1]
   %1 = zext i32 %clientPort to i64                ; <i64> [#uses=1]
   %2 = inttoptr i64 %1 to %struct.ComplexType*    ; <%struct.ComplexType*> [#uses=1]
diff --git a/test/CodeGen/X86/twoaddr-delete.ll b/test/CodeGen/X86/codegen-dce.ll
index 77e3c75c6d..d83efaf577 100644
--- a/test/CodeGen/X86/twoaddr-delete.ll
+++ b/test/CodeGen/X86/codegen-dce.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -stats |& grep {twoaddrinstr} | grep {Number of dead instructions deleted}
+; RUN: llc < %s -march=x86 -stats |& grep {codegen-dce} | grep {Number of dead instructions deleted}
 
 	%struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
 	%struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
diff --git a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
index 337f1b2a8e..8e38fe309f 100644
--- a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
+++ b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
@@ -1,19 +1,20 @@
 ; RUN: llc < %s -march=x86-64 -o %t -stats -info-output-file - | \
-; RUN:   grep {asm-printer} | grep {Number of machine instrs printed} | grep 5
+; RUN:   grep {asm-printer} | grep {Number of machine instrs printed} | grep 10
 ; RUN: grep {leal	1(\%rsi),} %t
 
-define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind optsize {
+define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, i8* %ptr) nounwind optsize {
 entry:
   %0 = add i32 %i2, 1           ; <i32> [#uses=1]
   %1 = sext i32 %0 to i64               ; <i64> [#uses=1]
-  %2 = getelementptr i8* null, i64 %1           ; <i8*> [#uses=1]
+  %2 = getelementptr i8* %ptr, i64 %1           ; <i8*> [#uses=1]
   %3 = load i8* %2, align 1             ; <i8> [#uses=1]
   %4 = icmp eq i8 0, %3         ; <i1> [#uses=1]
   br i1 %4, label %bb3, label %bb34
 
 bb3:            ; preds = %entry
   %5 = add i32 %i2, 4           ; <i32> [#uses=0]
-  ret i8 0
+  %6 = trunc i32 %5 to i8
+  ret i8 %6
 
 bb34:           ; preds = %entry
   ret i8 0
diff --git a/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/test/CodeGen/X86/ins_subreg_coalesce-3.ll
index e443085832..627edc51c1 100644
--- a/test/CodeGen/X86/ins_subreg_coalesce-3.ll
+++ b/test/CodeGen/X86/ins_subreg_coalesce-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep mov | count 11
+; RUN: llc < %s -march=x86-64 | grep mov | count 5
 
 	%struct.COMPOSITE = type { i8, i16, i16 }
 	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
diff --git a/test/CodeGen/X86/sext-i1.ll b/test/CodeGen/X86/sext-i1.ll
index 4f88c7c923..21c418d534 100644
--- a/test/CodeGen/X86/sext-i1.ll
+++ b/test/CodeGen/X86/sext-i1.ll
@@ -44,9 +44,9 @@ entry:
 
 ; 64: t3:
 ; 64: cmpl $1
-; 64: sbbl
-; 64: cmpl
 ; 64: sbbq
+; 64: cmpq
+; 64: xorl
   %not.tobool = icmp eq i32 undef, 0              ; <i1> [#uses=2]
   %cond = sext i1 %not.tobool to i32              ; <i32> [#uses=1]
   %conv = sext i1 %not.tobool to i64              ; <i64> [#uses=1]
diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll
index 5550d26338..b2af7c947d 100644
--- a/test/CodeGen/X86/sse3.ll
+++ b/test/CodeGen/X86/sse3.ll
@@ -63,10 +63,10 @@ define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind {
 	ret <8 x i16> %tmp
 ; X64: t4:
 ; X64: 	pextrw	$7, %xmm0, %eax
-; X64: 	pshufhw	$100, %xmm0, %xmm1
-; X64: 	pinsrw	$1, %eax, %xmm1
+; X64: 	pshufhw	$100, %xmm0, %xmm2
+; X64: 	pinsrw	$1, %eax, %xmm2
 ; X64: 	pextrw	$1, %xmm0, %eax
-; X64: 	movaps	%xmm1, %xmm0
+; X64: 	movaps	%xmm2, %xmm0
 ; X64: 	pinsrw	$4, %eax, %xmm0
 ; X64: 	ret
 }
diff --git a/test/CodeGen/X86/tailcall2.ll b/test/CodeGen/X86/tailcall2.ll
index 02bf0c00b4..80bab619c1 100644
--- a/test/CodeGen/X86/tailcall2.ll
+++ b/test/CodeGen/X86/tailcall2.ll
@@ -147,6 +147,8 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp {
 
 ; 32: t11:
 ; 32-NOT: subl ${{[0-9]+}}, %esp
+; 32: jne
+; 32-NOT: movl
 ; 32-NOT: addl ${{[0-9]+}}, %esp
 ; 32: jmp {{_?}}foo5