aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/X86/multiple-loop-post-inc.ll
diff options
context:
space:
mode:
authorAndrew Trick <atrick@apple.com>2012-06-26 04:11:38 +0000
committerAndrew Trick <atrick@apple.com>2012-06-26 04:11:38 +0000
commitc9b1e25493b393013b28e5d457f2fb2845a4dd9f (patch)
treec1193bd83841e829e703beeb00c1fe6415de5f05 /test/CodeGen/X86/multiple-loop-post-inc.ll
parent5ac3f96c0e4a1f6b8253aabf74fe30b0439e9bdf (diff)
Enable the new LoopInfo algorithm by default.
The primary advantage is that loop optimizations will be applied in a stable order. This helps debugging and unit test creation. It is also a better overall implementation without pathologically bad performance on deep functions. On large functions (llvm-stress --size=200000 | opt -loops) Before: 0.1263s After: 0.0225s On deep functions (after tweaking llvm-stress, thanks Nadav): Before: 0.2281s After: 0.0227s See r158790 for more comments. The loop tree is now consistently generated in forward order, but loop passes are applied in reverse order over the program. If we have a loop optimization that prefers forward order, that can easily be achieved by adding a different type of LoopPassManager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159183 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/multiple-loop-post-inc.ll')
-rw-r--r--test/CodeGen/X86/multiple-loop-post-inc.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll
index 7491190b01..9f7d036cf1 100644
--- a/test/CodeGen/X86/multiple-loop-post-inc.ll
+++ b/test/CodeGen/X86/multiple-loop-post-inc.ll
@@ -1,9 +1,9 @@
; RUN: llc -asm-verbose=false -disable-branch-fold -disable-code-place -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s
; rdar://7236213
-
-; Xfailed now that scheduler 2-address hack is disabled a lea is generated.
-; The code isn't any worse though.
-; XFAIL: *
+;
+; The scheduler's 2-address hack has been disabled, so there is
+; currently no good guarantee that this test will pass until the
+; machine scheduler develops an equivalent heuristic.
; CodeGen shouldn't require any lea instructions inside the marked loop.
; It should properly set up post-increment uses and do coalescing for