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authorEvan Cheng <evan.cheng@apple.com>2012-01-10 02:02:58 +0000
committerEvan Cheng <evan.cheng@apple.com>2012-01-10 02:02:58 +0000
commit97b5beb7fe7bb776654b04ae6c18af6ea15c74f7 (patch)
treeecf43bc095170286e1b89ca00a61e91a428d6449 /test/CodeGen/X86/machine-cse.ll
parent64925c55c65f9345a69fb67db07aa62cfb723577 (diff)
Allow machine-cse to look across MBB boundary when cse'ing instructions that
define physical registers. It's currently very restrictive, only catching cases where the CE is in an immediate (and only) predecessor. But it catches a surprising large number of cases. rdar://10660865 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147827 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/machine-cse.ll')
-rw-r--r--test/CodeGen/X86/machine-cse.ll24
1 files changed, 23 insertions, 1 deletions
diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll
index d819fc8f6e..a757cde6ab 100644
--- a/test/CodeGen/X86/machine-cse.ll
+++ b/test/CodeGen/X86/machine-cse.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-apple-macosx < %s | FileCheck %s
; rdar://7610418
%ptr = type { i8* }
@@ -77,3 +77,25 @@ bb.nph743.us: ; preds = %for.body53.us, %if.
sw.bb307: ; preds = %sw.bb, %entry
ret void
}
+
+; CSE physical register defining instruction across MBB boundary.
+; rdar://10660865
+define i32 @cross_mbb_phys_cse(i32 %a, i32 %b) nounwind ssp {
+entry:
+; CHECK: cross_mbb_phys_cse:
+; CHECK: cmpl
+; CHECK: ja
+ %cmp = icmp ugt i32 %a, %b
+ br i1 %cmp, label %return, label %if.end
+
+if.end: ; preds = %entry
+; CHECK-NOT: cmpl
+; CHECK: sbbl
+ %cmp1 = icmp ult i32 %a, %b
+ %. = sext i1 %cmp1 to i32
+ br label %return
+
+return: ; preds = %if.end, %entry
+ %retval.0 = phi i32 [ 1, %entry ], [ %., %if.end ]
+ ret i32 %retval.0
+}