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| author | Evan Cheng <evan.cheng@apple.com> | 2010-02-06 09:07:11 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-02-06 09:07:11 +0000 |
| commit | 00a99a35840451a291eb61a192a750908a4073ae (patch) | |
| tree | 9339c885e326a6d881e123500e772ba97e35e9a6 /test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll | |
| parent | e3e86dce64163a2082f3fc7be64c7dbb6e580493 (diff) | |
Run codegen dce pass for all targets at all optimization levels. Previously it's
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll')
| -rw-r--r-- | test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll index 337f1b2a8e..8e38fe309f 100644 --- a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll +++ b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll @@ -1,19 +1,20 @@ ; RUN: llc < %s -march=x86-64 -o %t -stats -info-output-file - | \ -; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 5 +; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 10 ; RUN: grep {leal 1(\%rsi),} %t -define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind optsize { +define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, i8* %ptr) nounwind optsize { entry: %0 = add i32 %i2, 1 ; <i32> [#uses=1] %1 = sext i32 %0 to i64 ; <i64> [#uses=1] - %2 = getelementptr i8* null, i64 %1 ; <i8*> [#uses=1] + %2 = getelementptr i8* %ptr, i64 %1 ; <i8*> [#uses=1] %3 = load i8* %2, align 1 ; <i8> [#uses=1] %4 = icmp eq i8 0, %3 ; <i1> [#uses=1] br i1 %4, label %bb3, label %bb34 bb3: ; preds = %entry %5 = add i32 %i2, 4 ; <i32> [#uses=0] - ret i8 0 + %6 = trunc i32 %5 to i8 + ret i8 %6 bb34: ; preds = %entry ret i8 0 |