aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/PowerPC/tailcallpic1.ll
diff options
context:
space:
mode:
authorArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
committerArnold Schwaighofer <arnold.schwaighofer@gmail.com>2008-04-30 09:16:33 +0000
commit30e62c098b5841259f8026df1c5c45c7c1182a38 (patch)
tree7a4da70d35c785bd6bd03768b4bf7ba3c42e24d2 /test/CodeGen/PowerPC/tailcallpic1.ll
parent4f06a0f6d583691bda2cf6e37d0c35e128bc4b8d (diff)
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/tailcallpic1.ll')
-rw-r--r--test/CodeGen/PowerPC/tailcallpic1.ll14
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/tailcallpic1.ll b/test/CodeGen/PowerPC/tailcallpic1.ll
new file mode 100644
index 0000000000..678d366fb6
--- /dev/null
+++ b/test/CodeGen/PowerPC/tailcallpic1.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -tailcallopt -mtriple=powerpc-apple-darwin -relocation-model=pic | grep TC_RETURN
+
+
+
+define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+entry:
+ ret i32 %a3
+}
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+entry:
+ %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1]
+ ret i32 %tmp11
+}