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| author | Reed Kotler <rkotler@mips.com> | 2013-02-20 05:45:15 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2013-02-20 05:45:15 +0000 |
| commit | 65692c809efa46337bf80f12b1795e785a6e7207 (patch) | |
| tree | f9f6d1833ac565de99fd963ba50bb3ba60bd36ef /test/CodeGen/Mips/setule.ll | |
| parent | d326d05fb9c794e93fc7fc0601028f196600f7e2 (diff) | |
Expand pseudos/macros:
SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16
$T8 shows up as register $24 when emitted from C++ code so we had
to change some tests that were already there for this functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175593 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/setule.ll')
| -rw-r--r-- | test/CodeGen/Mips/setule.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/Mips/setule.ll b/test/CodeGen/Mips/setule.ll index 792f2ae0fa..a6d6bf0640 100644 --- a/test/CodeGen/Mips/setule.ll +++ b/test/CodeGen/Mips/setule.ll @@ -16,7 +16,7 @@ entry: %conv = zext i1 %cmp to i32 store i32 %conv, i32* @r1, align 4 ; 16: sltu ${{[0-9]+}}, ${{[0-9]+}} -; 16: move $[[REGISTER:[0-9]+]], $t8 +; 16: move $[[REGISTER:[0-9]+]], $24 ; 16: xor $[[REGISTER]], ${{[0-9]+}} %2 = load i32* @m, align 4 %cmp1 = icmp ule i32 %2, %1 |