diff options
| author | Jyotsna Verma <jverma@codeaurora.org> | 2012-12-05 19:32:03 +0000 |
|---|---|---|
| committer | Jyotsna Verma <jverma@codeaurora.org> | 2012-12-05 19:32:03 +0000 |
| commit | 61b632d9f7193938083d9e676766b48043d3ba5d (patch) | |
| tree | 6e373891de5c07b8f07c38cd9f976e9497c87016 /test/CodeGen/Hexagon | |
| parent | a7e29c878cac1cc7e75959889dd841a16d764988 (diff) | |
Use multiclass to define store instructions with base+immediate offset
addressing mode and immediate stored value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169408 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
| -rw-r--r-- | test/CodeGen/Hexagon/args.ll | 3 | ||||
| -rw-r--r-- | test/CodeGen/Hexagon/dualstore.ll | 4 |
2 files changed, 3 insertions, 4 deletions
diff --git a/test/CodeGen/Hexagon/args.ll b/test/CodeGen/Hexagon/args.ll index 8a6efb620e..767a442612 100644 --- a/test/CodeGen/Hexagon/args.ll +++ b/test/CodeGen/Hexagon/args.ll @@ -1,6 +1,5 @@ ; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-hexagon-misched < %s | FileCheck %s -; CHECK: r[[T0:[0-9]+]] = #7 -; CHECK: memw(r29 + #0) = r[[T0]] +; CHECK: memw(r29{{ *}}+{{ *}}#0){{ *}}={{ *}}#7 ; CHECK: r5 = #6 ; CHECK: r0 = #1 ; CHECK: r1 = #2 diff --git a/test/CodeGen/Hexagon/dualstore.ll b/test/CodeGen/Hexagon/dualstore.ll index 9b27dda52c..067499530f 100644 --- a/test/CodeGen/Hexagon/dualstore.ll +++ b/test/CodeGen/Hexagon/dualstore.ll @@ -1,8 +1,8 @@ ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; Check that we generate dual stores in one packet in V4 -; CHECK: memw(r{{[0-9]+}} + #{{[0-9]+}}) = r{{[0-9]+}} -; CHECK-NEXT: memw(r{{[0-9]+}} + #{{[0-9]+}}) = r{{[0-9]+}} +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#{{[0-9]+}}){{ *}}={{ *}}#100000 +; CHECK-NEXT: memw(r{{[0-9]+}}{{ *}}+{{ *}}#{{[0-9]+}}){{ *}}={{ *}}#500000 ; CHECK-NEXT: } @Reg = global i32 0, align 4 |