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authorJyotsna Verma <jverma@codeaurora.org>2013-03-14 19:08:03 +0000
committerJyotsna Verma <jverma@codeaurora.org>2013-03-14 19:08:03 +0000
commitcec50e6da221edeef922a5d5f85081ba66b08dab (patch)
treeb96c54bac8f1b663e1a1870faf1a61bf33524b19 /test/CodeGen/Hexagon/misaligned-access.ll
parente2188d9c43d9e81407d2c7b7ef887e27f028a8ff (diff)
Hexagon: Removed asserts regarding alignment and offset.
We are warning the user about the alignment, so we should not assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177103 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon/misaligned-access.ll')
-rw-r--r--test/CodeGen/Hexagon/misaligned-access.ll16
1 files changed, 16 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/misaligned-access.ll b/test/CodeGen/Hexagon/misaligned-access.ll
new file mode 100644
index 0000000000..4dafb44cc3
--- /dev/null
+++ b/test/CodeGen/Hexagon/misaligned-access.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s
+; Check that the mis-aligned load doesn't cause compiler to assert.
+
+declare i32 @_hi(i64) #1
+@temp1 = common global i32 0, align 4
+
+define i32 @CSDRSEARCH_executeSearchManager() #0 {
+entry:
+ %temp = alloca i32, align 4
+ %0 = load i32* @temp1, align 4
+ store i32 %0, i32* %temp, align 4
+ %1 = bitcast i32* %temp to i64*
+ %2 = load i64* %1, align 8
+ %call = call i32 @_hi(i64 %2)
+ ret i32 %call
+}