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authorJyotsna Verma <jverma@codeaurora.org>2013-03-22 18:41:34 +0000
committerJyotsna Verma <jverma@codeaurora.org>2013-03-22 18:41:34 +0000
commit97e602b574b38d57384f0f877700357531a3d23e (patch)
tree4f44101da52fcb85fe5adf02f89077a378024337 /test/CodeGen/Hexagon/memops3.ll
parent4b52a88e90b341ff2a3d1dbad6eb5ea731228156 (diff)
Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177747 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon/memops3.ll')
-rw-r--r--test/CodeGen/Hexagon/memops3.ll31
1 files changed, 31 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/memops3.ll b/test/CodeGen/Hexagon/memops3.ll
new file mode 100644
index 0000000000..5b8bd6c87b
--- /dev/null
+++ b/test/CodeGen/Hexagon/memops3.ll
@@ -0,0 +1,31 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
+; Generate MemOps for V4 and above.
+
+
+define void @f(i8* nocapture %p) nounwind {
+entry:
+; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}#1
+ %add.ptr = getelementptr inbounds i8* %p, i32 10
+ %0 = load i8* %add.ptr, align 1, !tbaa !0
+ %conv = zext i8 %0 to i32
+ %sub = add nsw i32 %conv, 255
+ %conv1 = trunc i32 %sub to i8
+ store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0
+ ret void
+}
+
+define void @g(i8* nocapture %p, i32 %i) nounwind {
+entry:
+; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}#1
+ %add.ptr.sum = add i32 %i, 10
+ %add.ptr1 = getelementptr inbounds i8* %p, i32 %add.ptr.sum
+ %0 = load i8* %add.ptr1, align 1, !tbaa !0
+ %conv = zext i8 %0 to i32
+ %sub = add nsw i32 %conv, 255
+ %conv2 = trunc i32 %sub to i8
+ store i8 %conv2, i8* %add.ptr1, align 1, !tbaa !0
+ ret void
+}
+
+!0 = metadata !{metadata !"omnipotent char", metadata !1}
+!1 = metadata !{metadata !"Simple C/C++ TBAA"}