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authorBob Wilson <bob.wilson@apple.com>2009-08-06 18:46:26 +0000
committerBob Wilson <bob.wilson@apple.com>2009-08-06 18:46:26 +0000
commit004f7c70493b1ae607a2107b8eaba9fc061e7baf (patch)
tree3a84e3b16c8e60ad5a36a708eed889b4cf79671d /test/CodeGen/ARM/vld1.ll
parent27698ebdf88494a31bc161f698dc4dab008ecac6 (diff)
Fix incorrect intrinsic declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78329 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vld1.ll')
-rw-r--r--test/CodeGen/ARM/vld1.ll20
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll
index 2a5ee04eba..d5191338c9 100644
--- a/test/CodeGen/ARM/vld1.ll
+++ b/test/CodeGen/ARM/vld1.ll
@@ -70,14 +70,14 @@ define <2 x i64> @vld1Qi64(i64* %A) nounwind {
ret <2 x i64> %tmp1
}
-declare <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readnone
-declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16*) nounwind readnone
-declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32*) nounwind readnone
-declare <2 x float> @llvm.arm.neon.vld1f.v2f32(float*) nounwind readnone
-declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64*) nounwind readnone
+declare <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readonly
+declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i8*) nounwind readonly
+declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i8*) nounwind readonly
+declare <2 x float> @llvm.arm.neon.vld1f.v2f32(i8*) nounwind readonly
+declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i8*) nounwind readonly
-declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readnone
-declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16*) nounwind readnone
-declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32*) nounwind readnone
-declare <4 x float> @llvm.arm.neon.vld1f.v4f32(float*) nounwind readnone
-declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64*) nounwind readnone
+declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readonly
+declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i8*) nounwind readonly
+declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i8*) nounwind readonly
+declare <4 x float> @llvm.arm.neon.vld1f.v4f32(i8*) nounwind readonly
+declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i8*) nounwind readonly