diff options
author | Eric Christopher <echristo@apple.com> | 2010-09-28 00:35:09 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-09-28 00:35:09 +0000 |
commit | f5732c4ee5af93bddeb8f4612441bfdf19237ea3 (patch) | |
tree | aa06a5cbf45b918c2b520562c30ea98e66f44094 /lib | |
parent | ee70fa77b4f8bdfd93741609a4d33a831476d505 (diff) |
Fix fp constant loads to have a destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114930 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index e84989c10b..eb27fad5c3 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -397,8 +397,9 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) { unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; // The extra reg is for addrmode5. - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc)) - .addReg(DestReg).addConstantPoolIndex(Idx) + AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), + DestReg) + .addConstantPoolIndex(Idx) .addReg(0)); return DestReg; } |