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authorEvan Cheng <evan.cheng@apple.com>2010-05-17 21:54:50 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-17 21:54:50 +0000
commit47006be498e256cc8c356a2325c918b825ab2ab7 (patch)
tree6a5872c4cd349827aeffd2958a310fa070e0a229 /lib
parent648ac5153e2317d8eb21c5b201f7c58e6a04e2d6 (diff)
vmov of immediates are trivially re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103982 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/ARMInstrNEON.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td
index c87d7b4556..bd6ffc0dca 100644
--- a/lib/Target/ARM/ARMInstrNEON.td
+++ b/lib/Target/ARM/ARMInstrNEON.td
@@ -2862,6 +2862,7 @@ def vmovImm64 : PatLeaf<(build_vector), [{
// Note: Some of the cmode bits in the following VMOV instructions need to
// be encoded based on the immed values.
+let isReMaterializable = 1 in {
def VMOVv8i8 : N1ModImm<1, 0b000, 0b1110, 0, 0, 0, 1, (outs DPR:$dst),
(ins h8imm:$SIMM), IIC_VMOVImm,
"vmov", "i8", "$dst, $SIMM", "",
@@ -2897,6 +2898,7 @@ def VMOVv2i64 : N1ModImm<1, 0b000, 0b1110, 0, 1, 1, 1, (outs QPR:$dst),
(ins h64imm:$SIMM), IIC_VMOVImm,
"vmov", "i64", "$dst, $SIMM", "",
[(set QPR:$dst, (v2i64 vmovImm64:$SIMM))]>;
+} // isReMaterializable
// VMOV : Vector Get Lane (move scalar to ARM core register)