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| author | Bob Wilson <bob.wilson@apple.com> | 2010-11-29 19:35:23 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-11-29 19:35:23 +0000 |
| commit | 2fcda63763ef010c57f6e7f250868e355075f6cf (patch) | |
| tree | 869b92862dd4673ac3c7a01a1a6622814fee3e7f /lib | |
| parent | f1aa47dc1aed018e2f70ffe7d32dba51e2ac45fe (diff) | |
Fix copy-and-paste errors in VLD2-dup scheduling itineraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120311 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMScheduleA8.td | 4 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMScheduleA9.td | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMScheduleA8.td b/lib/Target/ARM/ARMScheduleA8.td index a364c4eccb..be92562a2e 100644 --- a/lib/Target/ARM/ARMScheduleA8.td +++ b/lib/Target/ARM/ARMScheduleA8.td @@ -527,13 +527,13 @@ def CortexA8Itineraries : ProcessorItineraries< InstrItinData<IIC_VLD2dup, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>, InstrStage<2, [A8_NLSPipe], 0>, InstrStage<2, [A8_LSPipe]>], - [2, 1]>, + [2, 2, 1]>, // // VLD2dupu InstrItinData<IIC_VLD2dupu, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>, InstrStage<2, [A8_NLSPipe], 0>, InstrStage<2, [A8_LSPipe]>], - [2, 2, 1, 1]>, + [2, 2, 2, 1, 1]>, // // VLD3 InstrItinData<IIC_VLD3, [InstrStage<1, [A8_Pipe0, A8_Pipe1], 0>, diff --git a/lib/Target/ARM/ARMScheduleA9.td b/lib/Target/ARM/ARMScheduleA9.td index 53c53bf1af..d775a9f26f 100644 --- a/lib/Target/ARM/ARMScheduleA9.td +++ b/lib/Target/ARM/ARMScheduleA9.td @@ -894,7 +894,7 @@ def CortexA9Itineraries : ProcessorItineraries< InstrStage<8, [A9_DRegsVFP], 0, Reserved>, InstrStage<2, [A9_NPipe], 0>, InstrStage<2, [A9_LSUnit]>], - [3, 1]>, + [3, 3, 1]>, // // VLD2dupu InstrItinData<IIC_VLD2dupu, [InstrStage<1, [A9_Issue0, A9_Issue1], 0>, @@ -903,7 +903,7 @@ def CortexA9Itineraries : ProcessorItineraries< InstrStage<8, [A9_DRegsVFP], 0, Reserved>, InstrStage<2, [A9_NPipe], 0>, InstrStage<2, [A9_LSUnit]>], - [3, 2, 1, 1]>, + [3, 3, 2, 1, 1]>, // // VLD3 InstrItinData<IIC_VLD3, [InstrStage<1, [A9_Issue0, A9_Issue1], 0>, |