diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-08 03:50:18 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-08 03:50:18 +0000 |
| commit | 4391bb75ecce0fe06dc6af8ad05b737da6a088e0 (patch) | |
| tree | 90e09e74a1cab4609105267d4167e0e5ce8e00b6 /lib | |
| parent | c9289f6a71017171c7d7c686379a4767903b3c3a (diff) | |
Simplify definition of FP move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MipsInstrFPU.td | 9 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 2 |
2 files changed, 6 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index 7a02343baf..836e0e44e3 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -163,10 +163,11 @@ let fd = 0 in { [(set FGR32:$fs, (bitconvert CPURegs:$rt))]>; } -def FMOV_S32 : FFR<0x11, 0b000110, 0x0, (outs FGR32:$fd), (ins FGR32:$fs), - "mov.s\t$fd, $fs", []>; -def FMOV_D32 : FFR<0x11, 0b000110, 0x1, (outs AFGR64:$fd), (ins AFGR64:$fs), - "mov.d\t$fd, $fs", []>; +def FMOV_S : FFR1<0x6, 16, "mov", "s", FGR32, FGR32>; +def FMOV_D32 : FFR1<0x6, 17, "mov", "d", AFGR64, AFGR64>, + Requires<[NotFP64bit]>; +def FMOV_D64 : FFR1<0x6, 17, "mov", "d", FGR64, FGR64>, + Requires<[IsFP64bit]>; /// Floating Point Memory Instructions let Predicates = [IsNotSingleFloat] in { diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 533f6fcc13..b79b521a23 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -119,7 +119,7 @@ copyPhysReg(MachineBasicBlock &MBB, Opc = Mips::MTLO, DestReg = 0; } else if (Mips::FGR32RegClass.contains(DestReg, SrcReg)) - Opc = Mips::FMOV_S32; + Opc = Mips::FMOV_S; else if (Mips::AFGR64RegClass.contains(DestReg, SrcReg)) Opc = Mips::FMOV_D32; else if (Mips::CCRRegClass.contains(DestReg, SrcReg)) |