diff options
| author | Dale Johannesen <dalej@apple.com> | 2008-03-17 17:11:08 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-03-17 17:11:08 +0000 |
| commit | 257f75d0b88a7d3d5ba5b7b7908a97f6dd56e27d (patch) | |
| tree | ff4b8df9ea98b6bf40e2a47c5b8291c6b47b41a5 /lib | |
| parent | b7f0c082cbb7a42c6cbe70d0278424f25cc29995 (diff) | |
Make Complex long long/double/long double work
in ppc64 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48459 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCCallingConv.td | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 19 |
2 files changed, 19 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCCallingConv.td b/lib/Target/PowerPC/PPCCallingConv.td index 6b6ae0778e..9f916f38d5 100644 --- a/lib/Target/PowerPC/PPCCallingConv.td +++ b/lib/Target/PowerPC/PPCCallingConv.td @@ -23,7 +23,7 @@ class CCIfSubtarget<string F, CCAction A> // Return-value convention for PowerPC def RetCC_PPC : CallingConv<[ CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>, - CCIfType<[i64], CCAssignToReg<[X3, X4]>>, + CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>, CCIfType<[f32], CCAssignToReg<[F1]>>, CCIfType<[f64], CCAssignToReg<[F1, F2]>>, diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index c6885cf7b8..88d4b5f63d 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2259,7 +2259,24 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG, NodeTys.push_back(MVT::i32); break; case MVT::i64: - if (Op.Val->getValueType(1) == MVT::i64) { + if (Op.Val->getNumValues()>=4 && + Op.Val->getValueType(3) == MVT::i64) { + Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1); + ResultVals[0] = Chain.getValue(0); + Chain = DAG.getCopyFromReg(Chain, PPC::X4, MVT::i64, + Chain.getValue(2)).getValue(1); + ResultVals[1] = Chain.getValue(0); + Chain = DAG.getCopyFromReg(Chain, PPC::X5, MVT::i64, + Chain.getValue(2)).getValue(1); + ResultVals[2] = Chain.getValue(0); + Chain = DAG.getCopyFromReg(Chain, PPC::X6, MVT::i64, + Chain.getValue(2)).getValue(1); + ResultVals[3] = Chain.getValue(0); + NumResults = 4; + NodeTys.push_back(MVT::i64); + NodeTys.push_back(MVT::i64); + NodeTys.push_back(MVT::i64); + } else if (Op.Val->getValueType(1) == MVT::i64) { Chain = DAG.getCopyFromReg(Chain, PPC::X3, MVT::i64, InFlag).getValue(1); ResultVals[0] = Chain.getValue(0); Chain = DAG.getCopyFromReg(Chain, PPC::X4, MVT::i64, |