diff options
| author | Nate Begeman <natebegeman@mac.com> | 2008-01-05 20:51:30 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2008-01-05 20:51:30 +0000 |
| commit | 219f67f0a5f07032f06e36c71fdb84188cc29fdb (patch) | |
| tree | a236a649cc015dc7f0c24c29139d3a951d4fd5d9 /lib | |
| parent | 2281a991414f681c482157265461b29a923ef620 (diff) | |
Remove an incorrect optimization that is performed correctly by
the target independent legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45631 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 2f629aca28..4aff4c5e23 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -3608,17 +3608,7 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { N2 = DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(),getPointerTy()); return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2); } - - N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, N1); - unsigned Idx = cast<ConstantSDNode>(N2)->getValue(); - MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); - MVT::ValueType MaskEVT = MVT::getVectorElementType(MaskVT); - SmallVector<SDOperand, 4> MaskVec; - for (unsigned i = 0; i < 4; ++i) - MaskVec.push_back(DAG.getConstant((i == Idx) ? i+4 : i, MaskEVT)); - return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, N0, N1, - DAG.getNode(ISD::BUILD_VECTOR, MaskVT, - &MaskVec[0], MaskVec.size())); + return SDOperand(); } SDOperand |