diff options
| author | Dan Gohman <gohman@apple.com> | 2008-02-27 21:12:32 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-02-27 21:12:32 +0000 |
| commit | ec59b95a19f59c075c74f01016a57218775b5d55 (patch) | |
| tree | 04b0a109c8e4bd4b53957bec721a7ccc33b6a230 /lib | |
| parent | fd1074f171d87eda903048ca94ab1927fd768afb (diff) | |
Don't hard-code the mask size to be 32, which is incorrect on ppc64
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47692 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 3cf39a0093..5500e37aae 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -741,16 +741,18 @@ bool PPCTargetLowering::SelectAddressRegReg(SDOperand N, SDOperand &Base, APInt LHSKnownZero, LHSKnownOne; APInt RHSKnownZero, RHSKnownOne; DAG.ComputeMaskedBits(N.getOperand(0), - APInt::getAllOnesValue(32), + APInt::getAllOnesValue(N.getOperand(0) + .getValueSizeInBits()), LHSKnownZero, LHSKnownOne); if (LHSKnownZero.getBoolValue()) { DAG.ComputeMaskedBits(N.getOperand(1), - APInt::getAllOnesValue(32), + APInt::getAllOnesValue(N.getOperand(1) + .getValueSizeInBits()), RHSKnownZero, RHSKnownOne); // If all of the bits are known zero on the LHS or RHS, the add won't // carry. - if ((LHSKnownZero | RHSKnownZero) == ~0U) { + if (~(LHSKnownZero | RHSKnownZero) == 0) { Base = N.getOperand(0); Index = N.getOperand(1); return true; |