diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-08-16 22:26:55 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-08-16 22:26:55 +0000 |
| commit | dc66edaced5dacb56f06f52723dd340d5cfe4eab (patch) | |
| tree | 2a1889b60846d442cc2e3b1c81e27238a7623a14 /lib | |
| parent | b05b80160a212626c34155daca9d858e1d0c445a (diff) | |
Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee
that the high halfword is zero. The shift need not be exactly 16 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 6 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 6 |
2 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 6fa99aec3f..09ce5528c5 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -2257,6 +2257,8 @@ def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF), (shl GPR:$src2, imm16_31:$shamt)), (PKHBT GPR:$src1, GPR:$src2, imm16_31:$shamt)>; +// Note: Shifts of 1-15 bits will be transformed to srl instead of sra and +// will match the pattern below. def PKHTB : AMiscA1I<0b01101000, (outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt), IIC_iALUsi, "pkhtb", "\t$dst, $src1, $src2, asr $shamt", @@ -2268,8 +2270,8 @@ def PKHTB : AMiscA1I<0b01101000, (outs GPR:$dst), // Alternate cases for PKHTB where identities eliminate some nodes. Note that // a shift amount of 0 is *not legal* here, it is PKHBT instead. -def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF0000), (srl GPR:$src2, (i32 16))), - (PKHTB GPR:$src1, GPR:$src2, 16)>; +def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF0000), (srl GPR:$src2, imm16_31:$sh)), + (PKHTB GPR:$src1, GPR:$src2, imm16_31:$sh)>; def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF0000), (and (srl GPR:$src2, imm1_15:$shamt), 0xFFFF)), (PKHTB GPR:$src1, GPR:$src2, imm1_15:$shamt)>; diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 2bde236fa8..26bfcae697 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -2106,6 +2106,8 @@ def : T2Pat<(or (and rGPR:$src1, 0xFFFF), (shl rGPR:$src2, imm16_31:$shamt)), (t2PKHBT rGPR:$src1, rGPR:$src2, imm16_31:$shamt)>, Requires<[HasT2ExtractPack]>; +// Note: Shifts of 1-15 bits will be transformed to srl instead of sra and +// will match the pattern below. def t2PKHTB : T2I<(outs rGPR:$dst), (ins rGPR:$src1, rGPR:$src2, i32imm:$shamt), IIC_iALUsi, "pkhtb", "\t$dst, $src1, $src2, asr $shamt", [(set rGPR:$dst, (or (and rGPR:$src1, 0xFFFF0000), @@ -2121,8 +2123,8 @@ def t2PKHTB : T2I<(outs rGPR:$dst), (ins rGPR:$src1, rGPR:$src2, i32imm:$shamt), // Alternate cases for PKHTB where identities eliminate some nodes. Note that // a shift amount of 0 is *not legal* here, it is PKHBT instead. -def : T2Pat<(or (and rGPR:$src1, 0xFFFF0000), (srl rGPR:$src2, (i32 16))), - (t2PKHTB rGPR:$src1, rGPR:$src2, 16)>, +def : T2Pat<(or (and rGPR:$src1, 0xFFFF0000), (srl rGPR:$src2, imm16_31:$sh)), + (t2PKHTB rGPR:$src1, rGPR:$src2, imm16_31:$sh)>, Requires<[HasT2ExtractPack]>; def : T2Pat<(or (and rGPR:$src1, 0xFFFF0000), (and (srl rGPR:$src2, imm1_15:$shamt), 0xFFFF)), |