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authorJim Grosbach <grosbach@apple.com>2012-03-30 21:54:22 +0000
committerJim Grosbach <grosbach@apple.com>2012-03-30 21:54:22 +0000
commitbf3c322640fdaf6e4a60a59ed8cb108a7f6685ad (patch)
treee0c25a6613da15eb46bf91459b64b4b174426b3b /lib
parentc19f72bd83e8cb2cc31257008ee9d7797dbf3dbb (diff)
ARM fix encoding fixup resolution for ldrd and friends.
The 8-bit payload is not contiguous in the opcode. Move the upper nibble over 4 bits into the correct place. rdar://11158641 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153780 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 3ba891da4f..5f2138d5de 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -469,7 +469,9 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
Value = -Value;
isAdd = false;
}
+ // The value has the low 4 bits encoded in [3:0] and the high 4 in [11:8].
assert ((Value < 256) && "Out of range pc-relative fixup value!");
+ Value = (Value & 0xf) | ((Value & 0xf0) << 4);
return Value | (isAdd << 23);
}
case ARM::fixup_arm_pcrel_10: