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authorEvan Cheng <evan.cheng@apple.com>2007-09-12 23:30:14 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-09-12 23:30:14 +0000
commit85dbe1a1d287864ca0d9482e3f4530929bf81511 (patch)
tree5d7dd7ea210e85caa046eba5331fd00c554f4041 /lib
parent0d8d31674f3cc95f5bba1174a0e8d54d5b9c210a (diff)
Initial support for multi-result patterns:
1. [(set GR32:$dst, (add GR32:$src1, GR32:$src2)), (modify EFLAGS)] This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS. 2. def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()> Similar to #1 except this is used for def : Pat patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/TargetSelectionDAG.td2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/TargetSelectionDAG.td b/lib/Target/TargetSelectionDAG.td
index 0698e1ea35..194f55f967 100644
--- a/lib/Target/TargetSelectionDAG.td
+++ b/lib/Target/TargetSelectionDAG.td
@@ -197,6 +197,8 @@ class SDNode<string opcode, SDTypeProfile typeprof,
}
def set;
+def modify;
+def parallel;
def node;
def srcvalue;