diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-10-25 07:53:28 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-10-25 07:53:28 +0000 |
commit | 4f54c1293af174a8002db20faf7b4f82ba4e8514 (patch) | |
tree | ad0e2d0f484461743f8c1e84fb6247d35d892c5e /lib | |
parent | ed3ad212ec34fa2866fb70f9e52ddda31032ea3b (diff) |
Add ARM getMatchingSuperRegClass to handle S / D / Q cross regclass coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85049 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 27 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.h | 7 |
2 files changed, 34 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 00e75310b6..17fc296991 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -254,6 +254,33 @@ bool ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, } const TargetRegisterClass * +ARMBaseRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, + const TargetRegisterClass *B, + unsigned SubIdx) const { + switch (SubIdx) { + default: return 0; + case 1: + case 2: + case 3: + case 4: + // S sub-registers. + if (A->getSize() == 8) { + if (A == &ARM::DPR_8RegClass) + return A; + return &ARM::DPR_VFP2RegClass; + } + + assert(A->getSize() == 16 && "Expecting a Q register class!"); + return &ARM::QPR_VFP2RegClass; + case 5: + case 6: + // D sub-registers. + return A; + } + return 0; +} + +const TargetRegisterClass * ARMBaseRegisterInfo::getPointerRegClass(unsigned Kind) const { return ARM::GPRRegisterClass; } diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.h b/lib/Target/ARM/ARMBaseRegisterInfo.h index f7d38e540d..750d29f8d6 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -74,6 +74,13 @@ public: BitVector getReservedRegs(const MachineFunction &MF) const; + /// getMatchingSuperRegClass - Return a subclass of the specified register + /// class A so that each register in it has a sub-register of the + /// specified sub-register index which is in the specified register class B. + virtual const TargetRegisterClass * + getMatchingSuperRegClass(const TargetRegisterClass *A, + const TargetRegisterClass *B, unsigned Idx) const; + const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator> |