diff options
| author | Chris Lattner <sabre@nondot.org> | 2010-10-31 19:22:57 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-10-31 19:22:57 +0000 |
| commit | 150d20e8fcadda6600bbb2e188c17a35b8ec7cbd (patch) | |
| tree | 845941644d1d7e4946834828ecaf98c802cd071d /lib | |
| parent | a4a3a5e3c212e7b4ac84fec94c9a140f120f3ff6 (diff) | |
fix the !eq operator in tblgen to return a bit instead of an int.
Use this to make the X86 and ARM targets set isCodeGenOnly=1
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117862 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 3 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 91789dae60..aa5a45da75 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -203,6 +203,9 @@ class InstTemplate<AddrMode am, SizeFlagVal sz, IndexMode im, Domain D = d; bit isUnaryDataProc = 0; bit canXformTo16Bit = 0; + + // If this is a pseudo instruction, mark it isCodeGenOnly. + let isCodeGenOnly = !eq(!cast<string>(f), "Pseudo"); // The layout of TSFlags should be kept in sync with ARMBaseInstrInfo.h. let TSFlags{4-0} = AM.Value; diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index ce85e3a49d..a440359108 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -125,6 +125,9 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins, dag InOperandList = ins; string AsmString = AsmStr; + // If this is a pseudo instruction, mark it isCodeGenOnly. + let isCodeGenOnly = !eq(!cast<string>(f), "Pseudo"); + // // Attributes specific to X86 instructions... // |