diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-03-24 23:26:29 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-03-24 23:26:29 +0000 |
| commit | 014dc4e7202f88fdd9c255837bf125f891f2f6b6 (patch) | |
| tree | 4dc71771f2b81c14e55d696ffe06a27140281f92 /lib | |
| parent | 375cf52638cc5330abf0fe95dfa63a013a97a5f5 (diff) | |
Speculatively revert this to see if it fixes buildbot failures.
--- Reverse-merging r99440 into '.':
U test/MC/AsmParser/X86/x86_32-bit_cat.s
U test/MC/AsmParser/X86/x86_32-encoding.s
U include/llvm/IntrinsicsX86.td
U include/llvm/CodeGen/SelectionDAGNodes.h
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.h | 3 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 45 |
2 files changed, 0 insertions, 48 deletions
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 46fa3cefdc..0f15ebafb0 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -234,9 +234,6 @@ namespace llvm { PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ, PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ, - // Advanced Encryption Standard (AES) Instructions - AESIMC, AESENC, AESENCLAST, AESDEC, AESDECLAST, - // ADD, SUB, SMUL, UMUL, etc. - Arithmetic operations with FLAGS results. ADD, SUB, SMUL, UMUL, INC, DEC, OR, XOR, AND, diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 372d522b6d..720b663a6a 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -69,12 +69,6 @@ def X86pcmpgtw : SDNode<"X86ISD::PCMPGTW", SDTIntBinOp>; def X86pcmpgtd : SDNode<"X86ISD::PCMPGTD", SDTIntBinOp>; def X86pcmpgtq : SDNode<"X86ISD::PCMPGTQ", SDTIntBinOp>; -def X86aesimc : SDNode<"X86ISD::AESIMC", SDTIntBinOp>; -def X86aesenc : SDNode<"X86ISD::AESENC", SDTIntBinOp>; -def X86aesenclast : SDNode<"X86ISD::AESENCLAST", SDTIntBinOp>; -def X86aesdec : SDNode<"X86ISD::AESDEC", SDTIntBinOp>; -def X86aesdeclast : SDNode<"X86ISD::AESDECLAST", SDTIntBinOp>; - def SDTX86CmpPTest : SDTypeProfile<0, 2, [SDTCisVT<0, v4f32>, SDTCisVT<1, v4f32>]>; def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>; @@ -3823,45 +3817,6 @@ def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, VR128:$src2)), def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))), (PCMPGTQrm VR128:$src1, addr:$src2)>; -defm AESIMC : SS42I_binop_rm_int<0xDB, "aesimc", - int_x86_sse42_aesimc>; -defm AESENC : SS42I_binop_rm_int<0xDC, "aesenc", - int_x86_sse42_aesenc>; -defm AESENCLAST : SS42I_binop_rm_int<0xDD, "aesenclast", - int_x86_sse42_aesenclast>; -defm AESDEC : SS42I_binop_rm_int<0xDE, "aesdec", - int_x86_sse42_aesdec>; -defm AESDECLAST : SS42I_binop_rm_int<0xDF, "aesdeclast", - int_x86_sse42_aesdeclast>; - -def : Pat<(v2i64 (X86aesimc VR128:$src1, VR128:$src2)), - (AESIMCrr VR128:$src1, VR128:$src2)>; -def : Pat<(v2i64 (X86aesimc VR128:$src1, (memop addr:$src2))), - (AESIMCrm VR128:$src1, addr:$src2)>; -def : Pat<(v2i64 (X86aesenc VR128:$src1, VR128:$src2)), - (AESENCrr VR128:$src1, VR128:$src2)>; -def : Pat<(v2i64 (X86aesenc VR128:$src1, (memop addr:$src2))), - (AESENCrm VR128:$src1, addr:$src2)>; -def : Pat<(v2i64 (X86aesenclast VR128:$src1, VR128:$src2)), - (AESENCLASTrr VR128:$src1, VR128:$src2)>; -def : Pat<(v2i64 (X86aesenclast VR128:$src1, (memop addr:$src2))), - (AESENCLASTrm VR128:$src1, addr:$src2)>; -def : Pat<(v2i64 (X86aesdec VR128:$src1, VR128:$src2)), - (AESDECrr VR128:$src1, VR128:$src2)>; -def : Pat<(v2i64 (X86aesdec VR128:$src1, (memop addr:$src2))), - (AESDECrm VR128:$src1, addr:$src2)>; -def : Pat<(v2i64 (X86aesdeclast VR128:$src1, VR128:$src2)), - (AESDECLASTrr VR128:$src1, VR128:$src2)>; -def : Pat<(v2i64 (X86aesdeclast VR128:$src1, (memop addr:$src2))), - (AESDECLASTrm VR128:$src1, addr:$src2)>; - -def AESKEYGENASSIST128rr : SS42AI<0xDF, MRMSrcReg, (outs), - (ins VR128:$src1, VR128:$src2, i8imm:$src3), - "aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize; -def AESKEYGENASSIST128rm : SS42AI<0xDF, MRMSrcMem, (outs), - (ins VR128:$src1, i128mem:$src2, i8imm:$src3), - "aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize; - // crc intrinsic instruction // This set of instructions are only rm, the only difference is the size // of r and m. |