diff options
| author | Scott Michel <scottm@aero.org> | 2008-11-25 00:23:16 +0000 |
|---|---|---|
| committer | Scott Michel <scottm@aero.org> | 2008-11-25 00:23:16 +0000 |
| commit | 662165d2249746b01b154287d3f5ed92f6293c2b (patch) | |
| tree | 9630edd4714a79555bbe7801eed1385d79350a98 /lib | |
| parent | 9822296b18c96550798cc83623f4b875e30872de (diff) | |
CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59998 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.td | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index 0b95474398..6e64caecb4 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -177,7 +177,9 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM) setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); +#if 0 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); +#endif // SPU has no intrinsics for these particular operations: setOperationAction(ISD::MEMBARRIER, MVT::Other, Expand); diff --git a/lib/Target/CellSPU/SPUInstrInfo.td b/lib/Target/CellSPU/SPUInstrInfo.td index 1d7800eafe..227b672551 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.td +++ b/lib/Target/CellSPU/SPUInstrInfo.td @@ -1982,7 +1982,7 @@ defm SHLQBII : ShiftLeftQuadByBitsImm; // not by bits. See notes above on SHLQBI. class SHLQBYInst<dag OOL, dag IOL, list<dag> pattern>: - RI7Form<0b11111011100, OOL, IOL, "shlqbyi\t$rT, $rA, $rB", + RI7Form<0b11111011100, OOL, IOL, "shlqby\t$rT, $rA, $rB", RotateShift, pattern>; class SHLQBYVecInst<ValueType vectype>: |