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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-11-14 18:48:36 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-11-14 18:48:36 +0000
commit4c5fe2d3ed4043c34f3305c081297ba4ca26ddc2 (patch)
treebe3954f42825311abfa3aa7d770451814367b778 /lib
parent9e29f780296feb1cddffbad640d2f813efc11b94 (diff)
Add function returning which operand holds immediate constant
for a given opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1307 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/SparcV9/SparcV9Internals.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index 53a4beb6ce..c24b9bd384 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -89,6 +89,22 @@ extern const MachineInstrDescriptor SparcMachineInstrDesc[];
class UltraSparcInstrInfo : public MachineInstrInfo {
public:
/*ctor*/ UltraSparcInstrInfo(const TargetMachine& tgt);
+
+ //
+ // All immediate constants are in position 0 except the
+ // store instructions.
+ //
+ virtual int getImmmedConstantPos(MachineOpCode opCode) const {
+ bool ignore;
+ if (this->maxImmedConstant(opCode, ignore) != 0)
+ {
+ assert(! this->isStore((MachineOpCode) STB - 1)); // first store is STB
+ assert(! this->isStore((MachineOpCode) STD + 1)); // last store is STD
+ return (opCode >= STB || opCode <= STD)? 2 : 1;
+ }
+ else
+ return -1;
+ }
virtual bool hasResultInterlock (MachineOpCode opCode) const
{