diff options
author | Chris Lattner <sabre@nondot.org> | 2004-11-30 06:29:10 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2004-11-30 06:29:10 +0000 |
commit | 7747040410fbeb4dcdc0edcdb450302427dd1762 (patch) | |
tree | 12d9c1e6dec41367f677dab557f90b52d3c163a3 /lib | |
parent | 93e6d8329c94b4f107150c29b1a6b535156c8608 (diff) |
Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18371 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/PowerPC/PPC32ISelSimple.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index 2c43dcae90..33512c1e39 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -2766,7 +2766,12 @@ void PPC32ISel::emitShiftOperation(MachineBasicBlock *MBB, // than for a variable shift by using the rlwimi instruction. if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(ShiftAmount)) { unsigned Amount = CUI->getValue(); - if (Amount < 32) { + if (Amount == 0) { + BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); + BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1) + .addReg(SrcReg+1).addReg(SrcReg+1); + + } else if (Amount < 32) { unsigned TempReg = makeAnotherReg(ResultTy); if (isLeftShift) { BuildMI(*MBB, IP, PPC::RLWINM, 4, TempReg).addReg(SrcReg) |