Eliminate the use of dominance frontiers in PromoteMemToReg. In addition to

eliminating a potentially quadratic data structure, this also gives a 17%
speedup when running -scalarrepl on test-suite + SPEC2000 + SPEC2006. My initial
experiment gave a greater speedup around 25%, but I moved the dominator tree
level computation from dominator tree construction to PromoteMemToReg.

Since this approach to computing IDFs has a much lower overhead than the old
code using precomputed DFs, it is worth looking at using this new code for the
second scalarrepl pass as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123609 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 2 insertions, 7 deletions

diff --git a/lib/Transforms/Scalar/ScalarReplAggregates.cpp b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
index a068556b73..5c90a36023 100644
--- a/lib/Transforms/Scalar/ScalarReplAggregates.cpp
+++ b/lib/Transforms/Scalar/ScalarReplAggregates.cpp
@@ -152,7 +152,6 @@ namespace {
     // will not alter the CFG, so say so.
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<DominatorTree>();
-      AU.addRequired<DominanceFrontier>();
       AU.setPreservesCFG();
     }
   };
@@ -180,7 +179,6 @@ char SROA_SSAUp::ID = 0;
 INITIALIZE_PASS_BEGIN(SROA_DF, "scalarrepl",
                 "Scalar Replacement of Aggregates (DF)", false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
-INITIALIZE_PASS_DEPENDENCY(DominanceFrontier)
 INITIALIZE_PASS_END(SROA_DF, "scalarrepl",
                 "Scalar Replacement of Aggregates (DF)", false, false)
 
@@ -877,11 +875,8 @@ public:
 bool SROA::performPromotion(Function &F) {
   std::vector<AllocaInst*> Allocas;
   DominatorTree *DT = 0;
-  DominanceFrontier *DF = 0;
-  if (HasDomFrontiers) {
+  if (HasDomFrontiers)
     DT = &getAnalysis<DominatorTree>();
-    DF = &getAnalysis<DominanceFrontier>();
-  }
 
   BasicBlock &BB = F.getEntryBlock();  // Get the entry node for the function
 
@@ -900,7 +895,7 @@ bool SROA::performPromotion(Function &F) {
     if (Allocas.empty()) break;
 
     if (HasDomFrontiers)
-      PromoteMemToReg(Allocas, *DT, *DF);
+      PromoteMemToReg(Allocas, *DT);
     else {
       SSAUpdater SSA;
       for (unsigned i = 0, e = Allocas.size(); i != e; ++i) {