diff options
author | Evan Cheng <evan.cheng@apple.com> | 2012-07-17 18:54:11 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2012-07-17 18:54:11 +0000 |
commit | a9e13ba3c8230073dd1157e4a17ef52906ac6cb8 (patch) | |
tree | f849baf7930c539651e1bb7307e95fcde46b5102 /lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | |
parent | d3e31218ef7ccf96b0bc7e06e2ebd279325c97fe (diff) |
Back out r160101 and instead implement a dag combine to recover from instcombine transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160387 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp')
-rw-r--r-- | lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 0a62242436..125c74a89a 100644 --- a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -40,13 +40,6 @@ static bool ShrinkDemandedConstant(Instruction *I, unsigned OpNo, // This instruction is producing bits that are not demanded. Shrink the RHS. Demanded &= OpC->getValue(); - if (I->getOpcode() == Instruction::Add) { - // However, if the instruction is an add then the constant may be negated - // when the opcode is changed to sub. Check if the transformation is really - // shrinking the constant. - if (Demanded.abs().getActiveBits() > OpC->getValue().abs().getActiveBits()) - return false; - } I->setOperand(OpNo, ConstantInt::get(OpC->getType(), Demanded)); return true; } |