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authorShuxin Yang <shuxin.llvm@gmail.com>2012-12-04 00:04:54 +0000
committerShuxin Yang <shuxin.llvm@gmail.com>2012-12-04 00:04:54 +0000
commitc811976b0400257511f2a255ec70538c3614f85e (patch)
tree1f1290d99a7f23d2c7d49d1e7c8a290589361ae8 /lib/Transforms/InstCombine/InstCombine.h
parentfc6374439edf2f74da4026f4cea8e341d092be5c (diff)
rdar://12329730 (2nd part)
This change tries to simmplify E1 = " X >> C1 << C2" into : - E2 = "X << (C2 - C1)" if C2 > C1, or - E2 = "X >> (C1 - C2)" if C1 > C2, or - E2 = X if C1 == C2. Reviewed by Nadav. Thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169182 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/InstCombine/InstCombine.h')
-rw-r--r--lib/Transforms/InstCombine/InstCombine.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Transforms/InstCombine/InstCombine.h b/lib/Transforms/InstCombine/InstCombine.h
index 90637a9d7b..ff5eeb6192 100644
--- a/lib/Transforms/InstCombine/InstCombine.h
+++ b/lib/Transforms/InstCombine/InstCombine.h
@@ -327,6 +327,11 @@ private:
bool SimplifyDemandedBits(Use &U, APInt DemandedMask,
APInt& KnownZero, APInt& KnownOne,
unsigned Depth=0);
+ /// Helper routine of SimplifyDemandedUseBits. It tries to simplify demanded
+ /// bit for "r1 = shr x, c1; r2 = shl r1, c2" instruction sequence.
+ Value *SimplifyShrShlDemandedBits(Instruction *Lsr, Instruction *Sftl,
+ APInt DemandedMask, APInt &KnownZero,
+ APInt &KnownOne);
/// SimplifyDemandedInstructionBits - Inst is an integer instruction that
/// SimplifyDemandedBits knows about. See if the instruction has any