Instead of passing in an unsigned value for the optimization level, use an enum,

which better identifies what the optimization is doing. And is more flexible for
future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8

49 files changed, 216 insertions, 132 deletions

diff --git a/lib/Target/ARM/ARM.h b/lib/Target/ARM/ARM.h
index 63bb8f6073..b275d2a8d8 100644
--- a/lib/Target/ARM/ARM.h
+++ b/lib/Target/ARM/ARM.h
@@ -15,6 +15,7 @@
 #ifndef TARGET_ARM_H
 #define TARGET_ARM_H
 
+#include "llvm/Target/TargetMachine.h"
 #include <cassert>
 
 namespace llvm {
@@ -91,7 +92,8 @@ inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
 FunctionPass *createARMISelDag(ARMTargetMachine &TM);
 FunctionPass *createARMCodePrinterPass(raw_ostream &O,
                                        ARMTargetMachine &TM,
-                                       unsigned OptLevel, bool Verbose);
+                                       CodeGenOpt::Level OptLevel,
+                                       bool Verbose);
 FunctionPass *createARMCodeEmitterPass(ARMTargetMachine &TM,
                                        MachineCodeEmitter &MCE);
 FunctionPass *createARMLoadStoreOptimizationPass();
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index a2ee52e30d..a5ce86e9df 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -138,17 +138,20 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
 
 
 // Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) {
+bool ARMTargetMachine::addInstSelector(PassManagerBase &PM,
+                                       CodeGenOpt::Level OptLevel) {
   PM.add(createARMISelDag(*this));
   return false;
 }
 
-bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) {
+bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM,
+                                      CodeGenOpt::Level OptLevel) {
   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
-  if (OptLevel != 0 && !DisableLdStOpti && !Subtarget.isThumb())
+  if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
     PM.add(createARMLoadStoreOptimizationPass());
 
-  if (OptLevel != 0 && !DisableIfConversion && !Subtarget.isThumb())
+  if (OptLevel != CodeGenOpt::None &&
+      !DisableIfConversion && !Subtarget.isThumb())
     PM.add(createIfConverterPass());
 
   PM.add(createARMConstantIslandPass());
@@ -156,7 +159,7 @@ bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) {
 }
 
 bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
-                                          unsigned OptLevel,
+                                          CodeGenOpt::Level OptLevel,
                                           bool Verbose,
                                           raw_ostream &Out) {
   // Output assembly language.
@@ -168,8 +171,10 @@ bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
 }
 
 
-bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
-                                      bool DumpAsm, MachineCodeEmitter &MCE) {
+bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM,
+                                      CodeGenOpt::Level OptLevel,
+                                      bool DumpAsm,
+                                      MachineCodeEmitter &MCE) {
   // FIXME: Move this to TargetJITInfo!
   if (DefRelocModel == Reloc::Default)
     setRelocationModel(Reloc::Static);
@@ -186,7 +191,7 @@ bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
 }
 
 bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
-                                            unsigned OptLevel,
+                                            CodeGenOpt::Level OptLevel,
                                             bool DumpAsm,
                                             MachineCodeEmitter &MCE) {
   // Machine code emitter pass for ARM.
diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h
index cfb617867d..3f65f71bbe 100644
--- a/lib/Target/ARM/ARMTargetMachine.h
+++ b/lib/Target/ARM/ARMTargetMachine.h
@@ -41,7 +41,8 @@ protected:
   // set this functions to ctor pointer at startup time if they are linked in.
   typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
                                             ARMTargetMachine &tm,
-                                            unsigned OptLevel, bool verbose);
+                                            CodeGenOpt::Level OptLevel,
+                                            bool verbose);
   static AsmPrinterCtorFn AsmPrinterCtor;
 
 public:
@@ -69,14 +70,17 @@ public:
   virtual const TargetAsmInfo *createTargetAsmInfo() const;
 
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel);
-  virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel);
-  virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
+  virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM,
+                                  CodeGenOpt::Level OptLevel,
                                   bool Verbose, raw_ostream &Out);
-  virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
                               bool DumpAsm, MachineCodeEmitter &MCE);
-  virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
-                                    bool DumpAsm, MachineCodeEmitter &MCE);
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+                                    CodeGenOpt::Level OptLevel,
+                                    bool DumpAsm,
+                                    MachineCodeEmitter &MCE);
 };
 
 /// ThumbTargetMachine - Thumb target machine.
diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
index 6559a9d797..d5def375c0 100644
--- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
@@ -81,7 +81,8 @@ namespace {
     bool InCPMode;
   public:
     explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
-                           const TargetAsmInfo *T, unsigned OL, bool V)
+                           const TargetAsmInfo *T, CodeGenOpt::Level OL,
+                           bool V)
       : AsmPrinter(O, TM, T, OL, V), DW(0), MMI(NULL), AFI(NULL), MCP(NULL),
         InCPMode(false) {
       Subtarget = &TM.getSubtarget<ARMSubtarget>();
@@ -1061,7 +1062,8 @@ bool ARMAsmPrinter::doFinalization(Module &M) {
 ///
 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
                                              ARMTargetMachine &tm,
-                                             unsigned OptLevel, bool verbose) {
+                                             CodeGenOpt::Level OptLevel,
+                                             bool verbose) {
   return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
 }
 
diff --git a/lib/Target/Alpha/Alpha.h b/lib/Target/Alpha/Alpha.h
index 994edaa24c..853109ae34 100644
--- a/lib/Target/Alpha/Alpha.h
+++ b/lib/Target/Alpha/Alpha.h
@@ -15,18 +15,20 @@
 #ifndef TARGET_ALPHA_H
 #define TARGET_ALPHA_H
 
+#include "llvm/Target/TargetMachine.h"
+
 namespace llvm {
 
   class AlphaTargetMachine;
   class FunctionPass;
-  class TargetMachine;
   class MachineCodeEmitter;
   class raw_ostream;
 
   FunctionPass *createAlphaISelDag(AlphaTargetMachine &TM);
   FunctionPass *createAlphaCodePrinterPass(raw_ostream &OS,
                                            TargetMachine &TM,
-                                           unsigned OptLevel, bool Verbose);
+                                           CodeGenOpt::Level OptLevel,
+                                           bool Verbose);
   FunctionPass *createAlphaPatternInstructionSelector(TargetMachine &TM);
   FunctionPass *createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
                                            MachineCodeEmitter &MCE);
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index 7a87612038..802a803670 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -77,25 +77,26 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
 //===----------------------------------------------------------------------===//
 
 bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
-                                         unsigned OptLevel) {
+                                         CodeGenOpt::Level OptLevel) {
   PM.add(createAlphaISelDag(*this));
   return false;
 }
 bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
-                                        unsigned OptLevel) {
+                                        CodeGenOpt::Level OptLevel) {
   // Must run branch selection immediately preceding the asm printer
   PM.add(createAlphaBranchSelectionPass());
   return false;
 }
 bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
-                                            unsigned OptLevel,
+                                            CodeGenOpt::Level OptLevel,
                                             bool Verbose,
                                             raw_ostream &Out) {
   PM.add(createAlphaLLRPPass(*this));
   PM.add(createAlphaCodePrinterPass(Out, *this, OptLevel, Verbose));
   return false;
 }
-bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
+                                        CodeGenOpt::Level OptLevel,
                                         bool DumpAsm, MachineCodeEmitter &MCE) {
   PM.add(createAlphaCodeEmitterPass(*this, MCE));
   if (DumpAsm)
@@ -103,7 +104,8 @@ bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
   return false;
 }
 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
-                                              unsigned OptLevel, bool DumpAsm,
+                                              CodeGenOpt::Level OptLevel,
+                                              bool DumpAsm,
                                               MachineCodeEmitter &MCE) {
   return addCodeEmitter(PM, OptLevel, DumpAsm, MCE);
 }
diff --git a/lib/Target/Alpha/AlphaTargetMachine.h b/lib/Target/Alpha/AlphaTargetMachine.h
index 309c2e8877..8dd07db062 100644
--- a/lib/Target/Alpha/AlphaTargetMachine.h
+++ b/lib/Target/Alpha/AlphaTargetMachine.h
@@ -58,14 +58,17 @@ public:
   static unsigned getModuleMatchQuality(const Module &M);
   
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel);
-  virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel);
-  virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, 
+  virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM,
+                                  CodeGenOpt::Level OptLevel,
                                   bool Verbose, raw_ostream &Out);
-  virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+  virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
                               bool DumpAsm, MachineCodeEmitter &MCE);
-  virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
-                                    bool DumpAsm, MachineCodeEmitter &MCE);
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+                                    CodeGenOpt::Level OptLevel,
+                                    bool DumpAsm,
+                                    MachineCodeEmitter &MCE);
 };
 
 } // end namespace llvm
diff --git a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
index 292a380595..0d200c5a1d 100644
--- a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
@@ -37,7 +37,8 @@ namespace {
     ///
 
     explicit AlphaAsmPrinter(raw_ostream &o, TargetMachine &tm,
-                             const TargetAsmInfo *T, unsigned OL, bool V)
+                             const TargetAsmInfo *T, CodeGenOpt::Level OL,
+                             bool V)
       : AsmPrinter(o, tm, T, OL, V) {}
 
     virtual const char *getPassName() const {
@@ -68,7 +69,7 @@ namespace {
 ///
 FunctionPass *llvm::createAlphaCodePrinterPass(raw_ostream &o,
                                                TargetMachine &tm,
-                                               unsigned OptLevel,
+                                               CodeGenOpt::Level OptLevel,
                                                bool verbose) {
   return new AlphaAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
 }
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index 0a8e9df523..5b35580a7d 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -3587,7 +3587,7 @@ void CWriter::visitExtractValueInst(ExtractValueInst &EVI) {
 bool CTargetMachine::addPassesToEmitWholeFile(PassManager &PM,
                                               raw_ostream &o,
                                               CodeGenFileType FileType,
-                                              unsigned OptLevel) {
+                                              CodeGenOpt::Level OptLevel) {
   if (FileType != TargetMachine::AssemblyFile) return true;
 
   PM.add(createGCLoweringPass());
diff --git a/lib/Target/CBackend/CTargetMachine.h b/lib/Target/CBackend/CTargetMachine.h
index a851486a20..8b262455ad 100644
--- a/lib/Target/CBackend/CTargetMachine.h
+++ b/lib/Target/CBackend/CTargetMachine.h
@@ -28,7 +28,7 @@ struct CTargetMachine : public TargetMachine {
   virtual bool WantsWholeFile() const { return true; }
   virtual bool addPassesToEmitWholeFile(PassManager &PM, raw_ostream &Out,
                                         CodeGenFileType FileType,
-                                        unsigned OptLevel);
+                                        CodeGenOpt::Level OptLevel);
 
   // This class always works, but must be requested explicitly on 
   // llc command line.
diff --git a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
index 6e77c87e6f..15cacd146a 100644
--- a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
+++ b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
@@ -49,7 +49,8 @@ namespace {
     std::set<std::string> FnStubs, GVStubs;
   public:
     explicit SPUAsmPrinter(raw_ostream &O, TargetMachine &TM,
-                           const TargetAsmInfo *T, unsigned OL, bool V) :
+                           const TargetAsmInfo *T, CodeGenOpt::Level OL,
+                           bool V) :
       AsmPrinter(O, TM, T, OL, V) {}
 
     virtual const char *getPassName() const {
@@ -288,8 +289,9 @@ namespace {
     DwarfWriter *DW;
     MachineModuleInfo *MMI;
   public:
-    LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM,
-                    const TargetAsmInfo *T, bool F, bool V)
+    explicit LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM,
+                             const TargetAsmInfo *T, CodeGenOpt::Level F,
+                             bool V)
       : SPUAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
 
     virtual const char *getPassName() const {
@@ -615,6 +617,7 @@ bool LinuxAsmPrinter::doFinalization(Module &M) {
 ///
 FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o,
                                             SPUTargetMachine &tm,
-                                            unsigned OptLevel, bool verbose) {
+                                            CodeGenOpt::Level OptLevel,
+                                            bool verbose) {
   return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
 }
diff --git a/lib/Target/CellSPU/SPU.h b/lib/Target/CellSPU/SPU.h
index 5c62bc3a42..77a062e0e2 100644
--- a/lib/Target/CellSPU/SPU.h
+++ b/lib/Target/CellSPU/SPU.h
@@ -16,6 +16,7 @@
 #define LLVM_TARGET_IBMCELLSPU_H
 
 #include "llvm/Support/DataTypes.h"
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
   class SPUTargetMachine;
@@ -25,7 +26,8 @@ namespace llvm {
   FunctionPass *createSPUISelDag(SPUTargetMachine &TM);
   FunctionPass *createSPUAsmPrinterPass(raw_ostream &o,
                                         SPUTargetMachine &tm,
-                                        unsigned OptLevel, bool verbose);
+                                        CodeGenOpt::Level OptLevel,
+                                        bool verbose);
 
   /*--== Utility functions/predicates/etc used all over the place: --==*/
   //! Predicate test for a signed 10-bit value
diff --git a/lib/Target/CellSPU/SPUTargetMachine.cpp b/lib/Target/CellSPU/SPUTargetMachine.cpp
index c8cf3643f5..7fa902243c 100644
--- a/lib/Target/CellSPU/SPUTargetMachine.cpp
+++ b/lib/Target/CellSPU/SPUTargetMachine.cpp
@@ -81,7 +81,8 @@ SPUTargetMachine::SPUTargetMachine(const Module &M, const std::string &FS)
 //===----------------------------------------------------------------------===//
 
 bool
-SPUTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel)
+SPUTargetMachine::addInstSelector(PassManagerBase &PM,
+                                  CodeGenOpt::Level OptLevel)
 {
   // Install an instruction selector.
   PM.add(createSPUISelDag(*this));
@@ -89,7 +90,7 @@ SPUTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel)
 }
 
 bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
-                                          unsigned OptLevel,
+                                          CodeGenOpt::Level OptLevel,
                                           bool Verbose,
                                           raw_ostream &Out) {
   PM.add(createSPUAsmPrinterPass(Out, *this, OptLevel, Verbose));
diff --git a/lib/Target/CellSPU/SPUTargetMachine.h b/lib/Target/CellSPU/SPUTargetMachine.h
index e959e9187b..cd39203338 100644
--- a/lib/Target/CellSPU/SPUTargetMachine.h
+++ b/lib/Target/CellSPU/SPUTargetMachine.h
@@ -83,8 +83,10 @@ public:
   }
   
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel);
-  virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
+  virtual bool addInstSelector(PassManagerBase &PM,
+                               CodeGenOpt::Level OptLevel);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM,
+                                  CodeGenOpt::Level OptLevel,
                                   bool Verbose, raw_ostream &Out);
 };
 
diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp
index 3d6362145e..849284e8d8 100644
--- a/lib/Target/CppBackend/CPPBackend.cpp
+++ b/lib/Target/CppBackend/CPPBackend.cpp
@@ -1995,7 +1995,7 @@ char CppWriter::ID = 0;
 bool CPPTargetMachine::addPassesToEmitWholeFile(PassManager &PM,
                                                 raw_ostream &o,
                                                 CodeGenFileType FileType,
-                                                unsigned OptLevel) {
+                                                CodeGenOpt::Level OptLevel) {
   if (FileType != TargetMachine::AssemblyFile) return true;
   PM.add(new CppWriter(o));
   return false;
diff --git a/lib/Target/CppBackend/CPPTargetMachine.h b/lib/Target/CppBackend/CPPTargetMachine.h
index 90b8268888..db4bc0e722 100644
--- a/lib/Target/CppBackend/CPPTargetMachine.h
+++ b/lib/Target/CppBackend/CPPTargetMachine.h
@@ -30,7 +30,7 @@ struct CPPTargetMachine : public TargetMachine {
   virtual bool WantsWholeFile() const { return true; }
   virtual bool addPassesToEmitWholeFile(PassManager &PM, raw_ostream &Out,
                                         CodeGenFileType FileType,
-                                        unsigned OptLevel);
+                                        CodeGenOpt::Level OptLevel);
 
   // This class always works, but shouldn't be the default in most cases.
   static unsigned getModuleMatchQuality(const Module &M) { return 1; }
diff --git a/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp b/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
index 5fd8811285..9cdcd73c63 100644
--- a/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
+++ b/lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
@@ -25,7 +25,6 @@
 #include "llvm/CodeGen/DwarfWriter.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/Target/TargetAsmInfo.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/Statistic.h"
@@ -38,7 +37,8 @@ namespace {
     std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
   public:
     explicit IA64AsmPrinter(raw_ostream &O, TargetMachine &TM,
-                            const TargetAsmInfo *T, unsigned OL, bool V)
+                            const TargetAsmInfo *T, CodeGenOpt::Level OL,
+                            bool V)
       : AsmPrinter(O, TM, T, OL, V) {}
 
     virtual const char *getPassName() const {
@@ -370,7 +370,7 @@ bool IA64AsmPrinter::doFinalization(Module &M) {
 ///
 FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o,
                                               IA64TargetMachine &tm,
-                                              unsigned OptLevel,
+                                              CodeGenOpt::Level OptLevel,
                                               bool verbose) {
   return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
 }
diff --git a/lib/Target/IA64/IA64.h b/lib/Target/IA64/IA64.h
index 46c26f0a5a..ec8e3d6d74 100644
--- a/lib/Target/IA64/IA64.h
+++ b/lib/Target/IA64/IA64.h
@@ -14,6 +14,8 @@
 #ifndef TARGET_IA64_H
 #define TARGET_IA64_H
 
+#include "llvm/Target/TargetMachin