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authorTom Stellard <thomas.stellard@amd.com>2012-12-13 19:38:52 +0000
committerTom Stellard <thomas.stellard@amd.com>2012-12-13 19:38:52 +0000
commit08f2d9379c486a0e4b950e476913ee97b38ec333 (patch)
tree0977db42cefea638eff2b355b376cf8d38ad4fa7 /lib/Target
parentdfebc4cc4c267f797e823b781d73586cc6fc49c5 (diff)
Fix warnings with -DNDEBUG
Patch by: NAKAMURA Takumi git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170142 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/R600/AMDILIntrinsicInfo.cpp2
-rw-r--r--lib/Target/R600/R600ISelLowering.cpp2
-rw-r--r--lib/Target/R600/R600InstrInfo.cpp1
3 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/R600/AMDILIntrinsicInfo.cpp b/lib/Target/R600/AMDILIntrinsicInfo.cpp
index 02d06d6f3d..70db4e6da2 100644
--- a/lib/Target/R600/AMDILIntrinsicInfo.cpp
+++ b/lib/Target/R600/AMDILIntrinsicInfo.cpp
@@ -75,5 +75,5 @@ Function*
AMDGPUIntrinsicInfo::getDeclaration(Module *M, unsigned IntrID,
Type **Tys,
unsigned numTys) const {
- assert(!"Not implemented");
+ llvm_unreachable("Not implemented");
}
diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
index eaeff4ec21..28d5470b8c 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -413,7 +413,7 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
Inst = 1;
break;
default:
- assert(0 && "Wrong buffer id for stream outputs !");
+ llvm_unreachable("Wrong buffer id for stream outputs !");
}
return InsertScalarToRegisterExport(DAG, Op.getDebugLoc(), OutputsMap,
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
index a60a1802d4..79bb97584e 100644
--- a/lib/Target/R600/R600InstrInfo.cpp
+++ b/lib/Target/R600/R600InstrInfo.cpp
@@ -605,6 +605,7 @@ MachineOperand &R600InstrInfo::getFlagOp(MachineInstr *MI, unsigned SrcIdx,
case MO_FLAG_ABS:
assert(!IsOP3 && "Cannot set absolute value modifier for OP3 "
"instructions.");
+ (void)IsOP3;
switch (SrcIdx) {
case 0: FlagIndex = getOperandIdx(*MI, R600Operands::SRC0_ABS); break;
case 1: FlagIndex = getOperandIdx(*MI, R600Operands::SRC1_ABS); break;