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authorEli Friedman <eli.friedman@gmail.com>2011-05-17 18:02:22 +0000
committerEli Friedman <eli.friedman@gmail.com>2011-05-17 18:02:22 +0000
commitb8e0d3412c8319a19f37c1d7000b786c8975bd61 (patch)
tree79294982761156da5862e7299d649ab68ede429b /lib/Target
parent6db2c2fe216637f4120899c7734a8600c64af0e8 (diff)
Clean up the mess created by r131467+r131469.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp12
-rw-r--r--lib/Target/X86/X86ISelLowering.h4
2 files changed, 0 insertions, 16 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6fcceae2df..ff4a283b58 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -2104,8 +2104,6 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
}
if (ShadowReg)
RegsToPass.push_back(std::make_pair(ShadowReg, Arg));
- } else { // Usual case: not byval.
- RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
}
} else if (!IsSibcall && (!isTailCall || isByVal)) {
assert(VA.isMemLoc());
@@ -11063,13 +11061,6 @@ static SDValue PerformEXTRACT_VECTOR_ELTCombine(SDNode *N, SelectionDAG &DAG,
return SDValue();
}
-/// PerformEXTRACT_VECTOR_ELTCombine - Detect vector gather/scatter index
-/// generation and convert it from being a bunch of shuffles and extracts
-/// to a simple store and scalar loads to extract the elements.
-static SDValue PerformVectorZeroExtendCombine(SDNode *N, SelectionDAG &DAG) {
- return SDValue();
-}
-
/// PerformSELECTCombine - Do target-specific dag combines on SELECT nodes.
static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG,
const X86Subtarget *Subtarget) {
@@ -12130,9 +12121,6 @@ SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
case X86ISD::VZEXT_MOVL: return PerformVZEXT_MOVLCombine(N, DAG);
case ISD::ZERO_EXTEND: return PerformZExtCombine(N, DAG);
case X86ISD::SETCC: return PerformSETCCCombine(N, DAG);
- case X86ISD::PMOVZXBW:
- case X86ISD::PMOVZXWD:
- case X86ISD::PMOVZXDQ: return PerformVectorZeroExtendCombine(N, DAG);
case X86ISD::SHUFPS: // Handle all target specific shuffles
case X86ISD::SHUFPD:
case X86ISD::PALIGN:
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index ad1652866e..ca84a99045 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -263,10 +263,6 @@ namespace llvm {
PUNPCKHDQ,
PUNPCKHQDQ,
- PMOVZXBW,
- PMOVZXWD,
- PMOVZXDQ,
-
// VASTART_SAVE_XMM_REGS - Save xmm argument registers to the stack,
// according to %al. An operator is needed so that this can be expanded
// with control flow.